Changeset 1915
- Timestamp:
- 05/06/07 11:25:24 (6 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/target/u-boot/patches/uboot-s3c2440.patch
r1912 r1915 148 148 149 149 150 @@ -637,8 +711,13 @@ 151 S3C24X0_REG32 SDIDCNT; 152 S3C24X0_REG32 SDIDSTA; 153 S3C24X0_REG32 SDIFSTA; 154 +#if defined(CONFIG_S3C2410) 155 S3C24X0_REG32 SDIDAT; 156 S3C24X0_REG32 SDIIMSK; 157 +#elif defined(CONFIG_S3C2440) 158 + S3C24X0_REG32 SDIIMSK; 159 + S3C24X0_REG32 SDIDAT; 160 +#endif 161 } /*__attribute__((__packed__))*/ S3C2410_SDI; 162 163 150 164 Index: u-boot/rtc/s3c24x0_rtc.c 151 165 =================================================================== … … 1230 1244 #endif 1231 1245 #endif 1246 Index: u-boot/cpu/arm920t/s3c24x0/mmc.c 1247 =================================================================== 1248 --- u-boot.orig/cpu/arm920t/s3c24x0/mmc.c 1249 +++ u-boot/cpu/arm920t/s3c24x0/mmc.c 1250 @@ -137,6 +137,9 @@ 1251 dcon |= S3C2410_SDIDCON_RXAFTERCMD|S3C2410_SDIDCON_XFER_RXSTART; 1252 if (wide) 1253 dcon |= S3C2410_SDIDCON_WIDEBUS; 1254 +#if defined(CONFIG_S3C2440) 1255 + dcon |= S3C2440_SDIDCON_DS_WORD | S3C2440_SDIDCON_DATSTART; 1256 +#endif 1257 sdi->SDIDCON = dcon; 1258 1259 /* send read command */ 1260 @@ -394,13 +397,18 @@ 1261 1262 clk_power->CLKCON |= (1 << 9); 1263 1264 + sdi->SDIBSIZE = 512; 1265 +#if defined(CONFIG_S3C2410) 1266 /* S3C2410 has some bug that prevents reliable operation at higher speed */ 1267 //sdi->SDIPRE = 0x3e; /* SDCLK = PCLK/2 / (SDIPRE+1) = 396kHz */ 1268 - sdi->SDIPRE = 0x02; /* SDCLK = PCLK/2 / (SDIPRE+1) = 396kHz */ 1269 - sdi->SDIBSIZE = 512; 1270 + sdi->SDIPRE = 0x02; /* 2410: SDCLK = PCLK/2 / (SDIPRE+1) = 11MHz */ 1271 sdi->SDIDTIMER = 0xffff; 1272 +#elif defined(CONFIG_S3C2440) 1273 + sdi->SDIPRE = 0x05; /* 2410: SDCLK = PCLK / (SDIPRE+1) = 11MHz */ 1274 + sdi->SDIDTIMER = 0x7fffff; 1275 +#endif 1276 sdi->SDIIMSK = 0x0; 1277 - sdi->SDICON = S3C2410_SDICON_FIFORESET|S3C2440_SDICON_MMCCLOCK; 1278 + sdi->SDICON = S3C2410_SDICON_FIFORESET|S3C2410_SDICON_CLOCKTYPE; 1279 udelay(125000); /* FIXME: 74 SDCLK cycles */ 1280 1281 mmc_csd.c_size = 0;
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