Changeset 3665
- Timestamp:
- 12/17/07 18:52:55 (6 years ago)
- Location:
- trunk/src/host/qemu-neo1973
- Files:
-
- 3 added
- 1 deleted
- 52 edited
-
Makefile (modified) (1 diff)
-
Makefile.target (modified) (3 diffs)
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audio/alsaaudio.c (modified) (2 diffs)
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block-raw-posix.c (added)
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block-raw-win32.c (added)
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block-raw.c (deleted)
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block-vpc.c (modified) (1 diff)
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block-vvfat.c (modified) (10 diffs)
-
cpu-all.h (modified) (1 diff)
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cpu-exec.c (modified) (8 diffs)
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exec-all.h (modified) (2 diffs)
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exec.c (modified) (3 diffs)
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gdbstub.c (modified) (6 diffs)
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hw/acpi.c (modified) (2 diffs)
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hw/apic.c (modified) (2 diffs)
-
hw/boards.h (modified) (1 diff)
-
hw/cirrus_vga.c (modified) (4 diffs)
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hw/dma.c (modified) (2 diffs)
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hw/fdc.c (modified) (1 diff)
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hw/i8254.c (modified) (4 diffs)
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hw/ide.c (modified) (6 diffs)
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hw/mainstone.c (modified) (2 diffs)
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hw/mc146818rtc.c (modified) (2 diffs)
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hw/ne2000.c (modified) (2 diffs)
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hw/pc.c (modified) (1 diff)
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hw/pcnet.c (modified) (4 diffs)
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hw/ps2.c (modified) (6 diffs)
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hw/pxa.h (modified) (3 diffs)
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hw/pxa2xx.c (modified) (1 diff)
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hw/pxa2xx_keypad.c (added)
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hw/rtl8139.c (modified) (8 diffs)
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hw/sb16.c (modified) (6 diffs)
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hw/sh.h (modified) (2 diffs)
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hw/sh7750.c (modified) (2 diffs)
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hw/sh_serial.c (modified) (1 diff)
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hw/sh_timer.c (modified) (6 diffs)
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hw/slavio_serial.c (modified) (26 diffs)
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hw/sun4m.c (modified) (3 diffs)
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hw/usb-uhci.c (modified) (2 diffs)
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hw/vga.c (modified) (4 diffs)
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hw/vmware_vga.c (modified) (2 diffs)
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linux-user/main.c (modified) (1 diff)
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linux-user/mmap.c (modified) (1 diff)
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linux-user/syscall.c (modified) (1 diff)
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monitor.c (modified) (2 diffs)
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osdep.h (modified) (1 diff)
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pc-bios/README (modified) (1 diff)
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pc-bios/openbios-sparc32 (modified) (previous)
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pc-bios/openbios-sparc64 (modified) (previous)
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qemu-doc.texi (modified) (2 diffs)
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target-sparc/op.c (modified) (2 diffs)
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target-sparc/op_helper.c (modified) (2 diffs)
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translate-all.c (modified) (2 diffs)
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vl.c (modified) (21 diffs)
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vnc.c (modified) (15 diffs)
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vnchextile.h (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/host/qemu-neo1973/Makefile
r3627 r3665 122 122 $(AR) rcs $@ $(OBJS) 123 123 124 QEMU_IMG_BLOCK_OBJS = $(BLOCK_OBJS) 125 ifdef CONFIG_WIN32 126 QEMU_IMG_BLOCK_OBJS += qemu-img-block-raw-win32.o 127 else 128 QEMU_IMG_BLOCK_OBJS += qemu-img-block-raw-posix.o 129 endif 130 124 131 ###################################################################### 125 132 126 qemu-img$(EXESUF): qemu-img.o qemu-img-block.o qemu-img-block-raw.o $(BLOCK_OBJS)133 qemu-img$(EXESUF): qemu-img.o qemu-img-block.o $(QEMU_IMG_BLOCK_OBJS) 127 134 $(CC) $(LDFLAGS) $(BASE_LDFLAGS) -o $@ $^ -lz $(LIBS) 128 135 -
trunk/src/host/qemu-neo1973/Makefile.target
r3627 r3665 162 162 else 163 163 BASE_CFLAGS+=-ffixed-g1 -ffixed-g6 164 HELPER_CFLAGS=$(CFLAGS) -ffixed-i0 -mflat164 HELPER_CFLAGS=$(CFLAGS) -ffixed-i0 165 165 # -static is used to avoid g1/g3 usage by the dynamic linker 166 166 BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld -static … … 399 399 VL_OBJS=vl.o osdep.o monitor.o pci.o loader.o isa_mmio.o 400 400 # XXX: suppress QEMU_TOOL tests 401 VL_OBJS+=block-raw.o 401 ifdef CONFIG_WIN32 402 VL_OBJS+=block-raw-win32.o 403 else 404 VL_OBJS+=block-raw-posix.o 405 endif 402 406 403 407 ifdef CONFIG_ALSA … … 503 507 VL_OBJS+= arm-semi.o 504 508 VL_OBJS+= pxa2xx.o pxa2xx_pic.o pxa2xx_gpio.o pxa2xx_timer.o pxa2xx_dma.o 505 VL_OBJS+= pxa2xx_lcd.o pxa2xx_mmci.o pxa2xx_pcmcia.o 509 VL_OBJS+= pxa2xx_lcd.o pxa2xx_mmci.o pxa2xx_pcmcia.o pxa2xx_keypad.o 506 510 VL_OBJS+= pflash_cfi01.o gumstix.o 507 511 VL_OBJS+= spitz.o ide.o serial.o nand.o ecc.o -
trunk/src/host/qemu-neo1973/audio/alsaaudio.c
r3443 r3665 87 87 88 88 struct alsa_params_req { 89 int freq;89 unsigned int freq; 90 90 audfmt_e fmt; 91 int nchannels;91 unsigned int nchannels; 92 92 unsigned int buffer_size; 93 93 unsigned int period_size; … … 286 286 snd_pcm_t *handle; 287 287 snd_pcm_hw_params_t *hw_params; 288 int err, freq, nchannels; 288 int err; 289 unsigned int freq, nchannels; 289 290 const char *pcm_name = in ? conf.pcm_name_in : conf.pcm_name_out; 290 291 unsigned int period_size, buffer_size; -
trunk/src/host/qemu-neo1973/block-vpc.c
r3406 r3665 82 82 static int vpc_probe(const uint8_t *buf, int buf_size, const char *filename) 83 83 { 84 if (buf_size >= 8 && !strncmp( buf, "conectix", 8))84 if (buf_size >= 8 && !strncmp((char *)buf, "conectix", 8)) 85 85 return 100; 86 86 return 0; -
trunk/src/host/qemu-neo1973/block-vvfat.c
r3443 r3665 413 413 414 414 /* dest is assumed to hold 258 bytes, and pads with 0xffff up to next multiple of 26 */ 415 static inline int short2long_name( unsignedchar* dest,const char* src)415 static inline int short2long_name(char* dest,const char* src) 416 416 { 417 417 int i; … … 566 566 return le16_to_cpu(*entry); 567 567 } else { 568 const uint8_t* x= s->fat.pointer+cluster*3/2;568 const uint8_t* x=(uint8_t*)(s->fat.pointer)+cluster*3/2; 569 569 return ((x[0]|(x[1]<<8))>>(cluster&1?4:0))&0x0fff; 570 570 } … … 627 627 entry=array_get_next(&(s->directory)); 628 628 memset(entry->name,0x20,11); 629 strncpy( entry->name,filename,i);629 strncpy((char*)entry->name,filename,i); 630 630 631 631 if(j > 0) … … 869 869 direntry_t* entry=array_get_next(&(s->directory)); 870 870 entry->attributes=0x28; /* archive | volume label */ 871 snprintf( entry->name,11,"QEMU VVFAT");871 snprintf((char*)entry->name,11,"QEMU VVFAT"); 872 872 } 873 873 … … 1188 1188 read_cluster_directory: 1189 1189 offset = s->cluster_size*(cluster_num-s->current_mapping->begin); 1190 s->cluster = s->directory.pointer+offset1190 s->cluster = (unsigned char*)s->directory.pointer+offset 1191 1191 + 0x20*s->current_mapping->info.dir.first_dir_index; 1192 1192 assert(((s->cluster-(unsigned char*)s->directory.pointer)%s->cluster_size)==0); … … 1458 1458 1459 1459 if (pointer[0] & 0x40) 1460 lfn->len = offset + strlen( lfn->name + offset);1460 lfn->len = offset + strlen((char*)lfn->name + offset); 1461 1461 1462 1462 return 0; … … 1497 1497 lfn->name[i + j + 1] = '\0'; 1498 1498 1499 lfn->len = strlen( lfn->name);1499 lfn->len = strlen((char*)lfn->name); 1500 1500 1501 1501 return 0; … … 1793 1793 goto fail; 1794 1794 } 1795 if (subret > 0 || !strcmp( lfn.name, ".")1796 || !strcmp( lfn.name, ".."))1795 if (subret > 0 || !strcmp((char*)lfn.name, ".") 1796 || !strcmp((char*)lfn.name, "..")) 1797 1797 continue; 1798 1798 } … … 1803 1803 goto fail; 1804 1804 } 1805 strcpy(path2 + path_len + 1, lfn.name);1805 strcpy(path2 + path_len + 1, (char*)lfn.name); 1806 1806 1807 1807 if (is_directory(direntries + i)) { … … 2235 2235 2236 2236 ret = vvfat_read(s->bs, cluster2sector(s, c), 2237 cluster, (rest_size + 0x1ff) / 0x200);2237 (uint8_t*)cluster, (rest_size + 0x1ff) / 0x200); 2238 2238 2239 2239 if (ret < 0) -
trunk/src/host/qemu-neo1973/cpu-all.h
r3517 r3665 717 717 code */ 718 718 #define PAGE_WRITE_ORG 0x0010 719 #define PAGE_RESERVED 0x0020 719 720 720 721 void page_dump(FILE *f); -
trunk/src/host/qemu-neo1973/cpu-exec.c
r3555 r3665 40 40 //#define DEBUG_EXEC 41 41 //#define DEBUG_SIGNAL 42 43 #define SAVE_GLOBALS() 44 #define RESTORE_GLOBALS() 45 46 #if defined(__sparc__) && !defined(HOST_SOLARIS) 47 #include <features.h> 48 #if defined(__GLIBC__) && ((__GLIBC__ < 2) || \ 49 ((__GLIBC__ == 2) && (__GLIBC_MINOR__ <= 90))) 50 // Work around ugly bugs in glibc that mangle global register contents 51 52 static volatile void *saved_env; 53 static volatile unsigned long saved_t0, saved_i7; 54 #undef SAVE_GLOBALS 55 #define SAVE_GLOBALS() do { \ 56 saved_env = env; \ 57 saved_t0 = T0; \ 58 asm volatile ("st %%i7, [%0]" : : "r" (&saved_i7)); \ 59 } while(0) 60 61 #undef RESTORE_GLOBALS 62 #define RESTORE_GLOBALS() do { \ 63 env = (void *)saved_env; \ 64 T0 = saved_t0; \ 65 asm volatile ("ld [%0], %%i7" : : "r" (&saved_i7)); \ 66 } while(0) 67 68 static int sparc_setjmp(jmp_buf buf) 69 { 70 int ret; 71 72 SAVE_GLOBALS(); 73 ret = setjmp(buf); 74 RESTORE_GLOBALS(); 75 return ret; 76 } 77 #undef setjmp 78 #define setjmp(jmp_buf) sparc_setjmp(jmp_buf) 79 80 static void sparc_longjmp(jmp_buf buf, int val) 81 { 82 SAVE_GLOBALS(); 83 longjmp(buf, val); 84 } 85 #define longjmp(jmp_buf, val) sparc_longjmp(jmp_buf, val) 86 #endif 87 #endif 42 88 43 89 void cpu_loop_exit(void) … … 134 180 tb->cs_base = cs_base; 135 181 tb->flags = flags; 136 cpu_gen_code(env, tb, CODE_GEN_MAX_SIZE, &code_gen_size); 182 SAVE_GLOBALS(); 183 cpu_gen_code(env, tb, &code_gen_size); 184 RESTORE_GLOBALS(); 137 185 code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1)); 138 186 … … 233 281 } 234 282 235 #if defined(__sparc__) && !defined(HOST_SOLARIS)236 #define BREAK_CHAIN tmp_T0 = 0237 #else238 283 #define BREAK_CHAIN T0 = 0 239 #endif240 284 241 285 /* main execution loop */ … … 250 294 #endif 251 295 #endif 252 #if defined(__sparc__) && !defined(HOST_SOLARIS)253 int saved_i7;254 target_ulong tmp_T0;255 #endif256 296 int ret, interrupt_request; 257 297 void (*gen_func)(void); … … 268 308 #include "hostregs_helper.h" 269 309 env = env1; 270 #if defined(__sparc__) && !defined(HOST_SOLARIS) 271 /* we also save i7 because longjmp may not restore it */ 272 asm volatile ("mov %%i7, %0" : "=r" (saved_i7)); 273 #endif 310 SAVE_GLOBALS(); 274 311 275 312 env_to_regs(); … … 381 418 T0 = 0; /* force lookup of first TB */ 382 419 for(;;) { 383 #if defined(__sparc__) && !defined(HOST_SOLARIS) 384 /* g1 can be modified by some libc? functions */ 385 tmp_T0 = T0; 386 #endif 420 SAVE_GLOBALS(); 387 421 interrupt_request = env->interrupt_request; 388 422 if (__builtin_expect(interrupt_request, 0) … … 598 632 } 599 633 #endif 600 #if defined(__sparc__) && !defined(HOST_SOLARIS) 601 T0 = tmp_T0; 602 #endif 634 RESTORE_GLOBALS(); 603 635 /* see if we can patch the calling TB. When the TB 604 636 spans two pages, we cannot safely do a direct … … 696 728 697 729 /* restore global registers */ 698 #if defined(__sparc__) && !defined(HOST_SOLARIS) 699 asm volatile ("mov %0, %%i7" : : "r" (saved_i7)); 700 #endif 730 RESTORE_GLOBALS(); 701 731 #include "hostregs_helper.h" 702 732 -
trunk/src/host/qemu-neo1973/exec-all.h
r3443 r3665 65 65 int gen_intermediate_code_pc(CPUState *env, struct TranslationBlock *tb); 66 66 void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf); 67 unsigned long code_gen_max_block_size(void); 67 68 int cpu_gen_code(CPUState *env, struct TranslationBlock *tb, 68 int max_code_size, int*gen_code_size_ptr);69 int *gen_code_size_ptr); 69 70 int cpu_restore_state(struct TranslationBlock *tb, 70 71 CPUState *env, unsigned long searched_pc, … … 95 96 } 96 97 97 #define CODE_GEN_MAX_SIZE 6553698 98 #define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */ 99 99 -
trunk/src/host/qemu-neo1973/exec.c
r3627 r3665 57 57 58 58 /* threshold to flush the translated code buffer */ 59 #define CODE_GEN_BUFFER_MAX_SIZE (CODE_GEN_BUFFER_SIZE - CODE_GEN_MAX_SIZE)59 #define CODE_GEN_BUFFER_MAX_SIZE (CODE_GEN_BUFFER_SIZE - code_gen_max_block_size()) 60 60 61 61 #define SMC_BITMAP_USE_THRESHOLD 10 … … 210 210 l1_phys_map = qemu_vmalloc(L1_SIZE * sizeof(void *)); 211 211 memset(l1_phys_map, 0, L1_SIZE * sizeof(void *)); 212 213 #if !defined(_WIN32) && defined(CONFIG_USER_ONLY) 214 { 215 long long startaddr, endaddr; 216 FILE *f; 217 int n; 218 219 f = fopen("/proc/self/maps", "r"); 220 if (f) { 221 do { 222 n = fscanf (f, "%llx-%llx %*[^\n]\n", &startaddr, &endaddr); 223 if (n == 2) { 224 page_set_flags(TARGET_PAGE_ALIGN(startaddr), 225 TARGET_PAGE_ALIGN(endaddr), 226 PAGE_RESERVED); 227 } 228 } while (!feof(f)); 229 fclose(f); 230 } 231 } 232 #endif 212 233 } 213 234 … … 623 644 tb->flags = flags; 624 645 tb->cflags = cflags; 625 cpu_gen_code(env, tb, CODE_GEN_MAX_SIZE,&code_gen_size);646 cpu_gen_code(env, tb, &code_gen_size); 626 647 code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1)); 627 648 -
trunk/src/host/qemu-neo1973/gdbstub.c
r3443 r3665 64 64 int line_buf_index; 65 65 int line_csum; 66 charlast_packet[4100];66 uint8_t last_packet[4100]; 67 67 int last_packet_len; 68 68 #ifdef CONFIG_USER_ONLY … … 189 189 { 190 190 int len, csum, i; 191 char*p;191 uint8_t *p; 192 192 193 193 #ifdef DEBUG_GDB … … 210 210 211 211 s->last_packet_len = p - s->last_packet; 212 put_buffer(s, s->last_packet, s->last_packet_len);212 put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); 213 213 214 214 #ifdef CONFIG_USER_ONLY … … 1180 1180 CPUState *env = s->env; 1181 1181 int i, csum; 1182 char reply[1];1182 uint8_t reply; 1183 1183 1184 1184 #ifndef CONFIG_USER_ONLY … … 1190 1190 printf("Got NACK, retransmitting\n"); 1191 1191 #endif 1192 put_buffer(s, s->last_packet, s->last_packet_len);1192 put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); 1193 1193 } 1194 1194 #ifdef DEBUG_GDB … … 1238 1238 } 1239 1239 if (s->line_csum != (csum & 0xff)) { 1240 reply [0]= '-';1241 put_buffer(s, reply, 1);1240 reply = '-'; 1241 put_buffer(s, &reply, 1); 1242 1242 s->state = RS_IDLE; 1243 1243 } else { 1244 reply [0]= '+';1245 put_buffer(s, reply, 1);1244 reply = '+'; 1245 put_buffer(s, &reply, 1); 1246 1246 s->state = gdb_handle_packet(s, env, s->line_buf); 1247 1247 } -
trunk/src/host/qemu-neo1973/hw/acpi.c
r3443 r3665 440 440 qemu_put_8s(f, &s->apms); 441 441 qemu_put_timer(f, s->tmr_timer); 442 qemu_put_be64 s(f, &s->tmr_overflow_time);442 qemu_put_be64(f, s->tmr_overflow_time); 443 443 } 444 444 … … 461 461 qemu_get_8s(f, &s->apms); 462 462 qemu_get_timer(f, s->tmr_timer); 463 qemu_get_be64s(f, &s->tmr_overflow_time);463 s->tmr_overflow_time=qemu_get_be64(f); 464 464 465 465 pm_io_space_update(s); -
trunk/src/host/qemu-neo1973/hw/apic.c
r3443 r3665 762 762 qemu_put_be32s(f, &s->icr[1]); 763 763 qemu_put_be32s(f, &s->divide_conf); 764 qemu_put_be32 s(f, &s->count_shift);764 qemu_put_be32(f, s->count_shift); 765 765 qemu_put_be32s(f, &s->initial_count); 766 qemu_put_be64 s(f, &s->initial_count_load_time);767 qemu_put_be64 s(f, &s->next_time);766 qemu_put_be64(f, s->initial_count_load_time); 767 qemu_put_be64(f, s->next_time); 768 768 769 769 qemu_put_timer(f, s->timer); … … 798 798 qemu_get_be32s(f, &s->icr[1]); 799 799 qemu_get_be32s(f, &s->divide_conf); 800 qemu_get_be32s(f, &s->count_shift);800 s->count_shift=qemu_get_be32(f); 801 801 qemu_get_be32s(f, &s->initial_count); 802 qemu_get_be64s(f, &s->initial_count_load_time);803 qemu_get_be64s(f, &s->next_time);802 s->initial_count_load_time=qemu_get_be64(f); 803 s->next_time=qemu_get_be64(f); 804 804 805 805 if (version_id >= 2) -
trunk/src/host/qemu-neo1973/hw/boards.h
r3582 r3665 53 53 54 54 /* sun4m.c */ 55 extern QEMUMachine ss5_machine, ss10_machine, ss600mp_machine ;55 extern QEMUMachine ss5_machine, ss10_machine, ss600mp_machine, ss20_machine; 56 56 57 57 /* sun4u.c */ -
trunk/src/host/qemu-neo1973/hw/cirrus_vga.c
r3443 r3665 2986 2986 qemu_put_8s(f, &s->ar_index); 2987 2987 qemu_put_buffer(f, s->ar, 21); 2988 qemu_put_be32 s(f, &s->ar_flip_flop);2988 qemu_put_be32(f, s->ar_flip_flop); 2989 2989 qemu_put_8s(f, &s->cr_index); 2990 2990 qemu_put_buffer(f, s->cr, 256); … … 3001 3001 qemu_put_buffer(f, s->palette, 768); 3002 3002 3003 qemu_put_be32 s(f, &s->bank_offset);3003 qemu_put_be32(f, s->bank_offset); 3004 3004 3005 3005 qemu_put_8s(f, &s->cirrus_hidden_dac_lockindex); … … 3037 3037 qemu_get_8s(f, &s->ar_index); 3038 3038 qemu_get_buffer(f, s->ar, 21); 3039 qemu_get_be32s(f, &s->ar_flip_flop);3039 s->ar_flip_flop=qemu_get_be32(f); 3040 3040 qemu_get_8s(f, &s->cr_index); 3041 3041 qemu_get_buffer(f, s->cr, 256); … … 3052 3052 qemu_get_buffer(f, s->palette, 768); 3053 3053 3054 qemu_get_be32s(f, &s->bank_offset);3054 s->bank_offset=qemu_get_be32(f); 3055 3055 3056 3056 qemu_get_8s(f, &s->cirrus_hidden_dac_lockindex); -
trunk/src/host/qemu-neo1973/hw/dma.c
r3443 r3665 483 483 qemu_put_8s (f, &d->mask); 484 484 qemu_put_8s (f, &d->flip_flop); 485 qemu_put_be32 s (f, &d->dshift);485 qemu_put_be32 (f, d->dshift); 486 486 487 487 for (i = 0; i < 4; ++i) { 488 488 struct dma_regs *r = &d->regs[i]; 489 qemu_put_be32 s (f, &r->now[0]);490 qemu_put_be32 s (f, &r->now[1]);489 qemu_put_be32 (f, r->now[0]); 490 qemu_put_be32 (f, r->now[1]); 491 491 qemu_put_be16s (f, &r->base[0]); 492 492 qemu_put_be16s (f, &r->base[1]); … … 511 511 qemu_get_8s (f, &d->mask); 512 512 qemu_get_8s (f, &d->flip_flop); 513 qemu_get_be32s (f, &d->dshift);513 d->dshift=qemu_get_be32 (f); 514 514 515 515 for (i = 0; i < 4; ++i) { 516 516 struct dma_regs *r = &d->regs[i]; 517 qemu_get_be32s (f, &r->now[0]);518 qemu_get_be32s (f, &r->now[1]);517 r->now[0]=qemu_get_be32 (f); 518 r->now[1]=qemu_get_be32 (f); 519 519 qemu_get_be16s (f, &r->base[0]); 520 520 qemu_get_be16s (f, &r->base[1]); -
trunk/src/host/qemu-neo1973/hw/fdc.c
r3443 r3665 181 181 uint8_t max_track; 182 182 uint8_t max_head; 183 const unsignedchar *str;183 const char *str; 184 184 } fd_format_t; 185 185 -
trunk/src/host/qemu-neo1973/hw/i8254.c
r3443 r3665 398 398 for(i = 0; i < 3; i++) { 399 399 s = &pit->channels[i]; 400 qemu_put_be32 s(f, &s->count);400 qemu_put_be32(f, s->count); 401 401 qemu_put_be16s(f, &s->latched_count); 402 402 qemu_put_8s(f, &s->count_latched); … … 410 410 qemu_put_8s(f, &s->bcd); 411 411 qemu_put_8s(f, &s->gate); 412 qemu_put_be64 s(f, &s->count_load_time);412 qemu_put_be64(f, s->count_load_time); 413 413 if (s->irq_timer) { 414 qemu_put_be64 s(f, &s->next_transition_time);414 qemu_put_be64(f, s->next_transition_time); 415 415 qemu_put_timer(f, s->irq_timer); 416 416 } … … 429 429 for(i = 0; i < 3; i++) { 430 430 s = &pit->channels[i]; 431 qemu_get_be32s(f, &s->count);431 s->count=qemu_get_be32(f); 432 432 qemu_get_be16s(f, &s->latched_count); 433 433 qemu_get_8s(f, &s->count_latched); … … 441 441 qemu_get_8s(f, &s->bcd); 442 442 qemu_get_8s(f, &s->gate); 443 qemu_get_be64s(f, &s->count_load_time);443 s->count_load_time=qemu_get_be64(f); 444 444 if (s->irq_timer) { 445 qemu_get_be64s(f, &s->next_transition_time);445 s->next_transition_time=qemu_get_be64(f); 446 446 qemu_get_timer(f, s->irq_timer); 447 447 } -
trunk/src/host/qemu-neo1973/hw/ide.c
r3627 r3665 472 472 put_le16(p + 6, s->sectors); 473 473 snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial); 474 padstr(( uint8_t*)(p + 10), buf, 20); /* serial number */474 padstr((char *)(p + 10), buf, 20); /* serial number */ 475 475 put_le16(p + 20, 3); /* XXX: retired, remove ? */ 476 476 put_le16(p + 21, 512); /* cache size in sectors */ 477 477 put_le16(p + 22, 4); /* ecc bytes */ 478 padstr(( uint8_t*)(p + 23), QEMU_VERSION, 8); /* firmware version */479 padstr(( uint8_t*)(p + 27), "QEMU HARDDISK", 40); /* model */478 padstr((char *)(p + 23), QEMU_VERSION, 8); /* firmware version */ 479 padstr((char *)(p + 27), "QEMU HARDDISK", 40); /* model */ 480 480 #if MAX_MULT_SECTORS > 1 481 481 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS); … … 537 537 put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0)); 538 538 snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial); 539 padstr(( uint8_t*)(p + 10), buf, 20); /* serial number */539 padstr((char *)(p + 10), buf, 20); /* serial number */ 540 540 put_le16(p + 20, 3); /* buffer type */ 541 541 put_le16(p + 21, 512); /* cache size in sectors */ 542 542 put_le16(p + 22, 4); /* ecc bytes */ 543 padstr(( uint8_t*)(p + 23), QEMU_VERSION, 8); /* firmware version */544 padstr(( uint8_t*)(p + 27), "QEMU CD-ROM", 40); /* model */543 padstr((char *)(p + 23), QEMU_VERSION, 8); /* firmware version */ 544 padstr((char *)(p + 27), "QEMU CD-ROM", 40); /* model */ 545 545 put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */ 546 546 #ifdef USE_DMA_CDROM … … 592 592 put_le16(p + 8, s->nb_sectors); /* Sectors per card */ 593 593 snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial); 594 padstr(( uint8_t*)(p + 10), buf, 20); /* Serial number in ASCII */594 padstr((char *)(p + 10), buf, 20); /* Serial number in ASCII */ 595 595 put_le16(p + 22, 0x0004); /* ECC bytes */ 596 padstr(( uint8_t*) (p + 23), QEMU_VERSION, 8); /* Firmware Revision */597 padstr(( uint8_t*) (p + 27), "QEMU MICRODRIVE", 40);/* Model number */596 padstr((char *) (p + 23), QEMU_VERSION, 8); /* Firmware Revision */ 597 padstr((char *) (p + 27), "QEMU MICRODRIVE", 40);/* Model number */ 598 598 #if MAX_MULT_SECTORS > 1 599 599 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS); … … 2043 2043 s->status = 0x00; /* NOTE: READY is _not_ set */ 2044 2044 s->error = 0x01; 2045 ide_set_irq(s); 2045 2046 break; 2046 2047 case WIN_SRST: … … 2509 2510 static void ide_save(QEMUFile* f, IDEState *s) 2510 2511 { 2511 qemu_put_be32 s(f, &s->mult_sectors);2512 qemu_put_be32 s(f, &s->identify_set);2512 qemu_put_be32(f, s->mult_sectors); 2513 qemu_put_be32(f, s->identify_set); 2513 2514 if (s->identify_set) { 2514 2515 qemu_put_buffer(f, (const uint8_t *)s->identify_data, 512); … … 2537 2538 static void ide_load(QEMUFile* f, IDEState *s) 2538 2539 { 2539 qemu_get_be32s(f, &s->mult_sectors);2540 qemu_get_be32s(f, &s->identify_set);2540 s->mult_sectors=qemu_get_be32(f); 2541 s->identify_set=qemu_get_be32(f); 2541 2542 if (s->identify_set) { 2542 2543 qemu_get_buffer(f, (uint8_t *)s->identify_data, 512); -
trunk/src/host/qemu-neo1973/hw/mainstone.c
r3627 r3665 18 18 #include "sysemu.h" 19 19 #include "flash.h" 20 21 static struct keymap map[0xE0] = { 22 [0 ... 0xDF] = { -1, -1 }, 23 [0x1e] = {0,0}, /* a */ 24 [0x30] = {0,1}, /* b */ 25 [0x2e] = {0,2}, /* c */ 26 [0x20] = {0,3}, /* d */ 27 [0x12] = {0,4}, /* e */ 28 [0x21] = {0,5}, /* f */ 29 [0x22] = {1,0}, /* g */ 30 [0x23] = {1,1}, /* h */ 31 [0x17] = {1,2}, /* i */ 32 [0x24] = {1,3}, /* j */ 33 [0x25] = {1,4}, /* k */ 34 [0x26] = {1,5}, /* l */ 35 [0x32] = {2,0}, /* m */ 36 [0x31] = {2,1}, /* n */ 37 [0x18] = {2,2}, /* o */ 38 [0x19] = {2,3}, /* p */ 39 [0x10] = {2,4}, /* q */ 40 [0x13] = {2,5}, /* r */ 41 [0x1f] = {3,0}, /* s */ 42 [0x14] = {3,1}, /* t */ 43 [0x16] = {3,2}, /* u */ 44 [0x2f] = {3,3}, /* v */ 45 [0x11] = {3,4}, /* w */ 46 [0x2d] = {3,5}, /* x */ 47 [0x15] = {4,2}, /* y */ 48 [0x2c] = {4,3}, /* z */ 49 [0xc7] = {5,0}, /* Home */ 50 [0x2a] = {5,1}, /* shift */ 51 [0x39] = {5,2}, /* space */ 52 [0x39] = {5,3}, /* space */ 53 [0x1c] = {5,5}, /* enter */ 54 [0xc8] = {6,0}, /* up */ 55 [0xd0] = {6,1}, /* down */ 56 [0xcb] = {6,2}, /* left */ 57 [0xcd] = {6,3}, /* right */ 58 }; 20 59 21 60 enum mainstone_model_e { mainstone }; … … 80 119 mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0); 81 120 121 /* setup keypad */ 122 printf("map addr %p\n", &map); 123 pxa27x_register_keypad(cpu->kp, map, 0xe0); 124 82 125 /* MMC/SD host */ 83 126 pxa2xx_mmci_handlers(cpu->mmc, NULL, mst_irq[MMC_IRQ]); -
trunk/src/host/qemu-neo1973/hw/mc146818rtc.c
r3443 r3665 422 422 qemu_put_8s(f, &s->cmos_index); 423 423 424 qemu_put_be32 s(f, &s->current_tm.tm_sec);425 qemu_put_be32 s(f, &s->current_tm.tm_min);426 qemu_put_be32 s(f, &s->current_tm.tm_hour);427 qemu_put_be32 s(f, &s->current_tm.tm_wday);428 qemu_put_be32 s(f, &s->current_tm.tm_mday);429 qemu_put_be32 s(f, &s->current_tm.tm_mon);430 qemu_put_be32 s(f, &s->current_tm.tm_year);424 qemu_put_be32(f, s->current_tm.tm_sec); 425 qemu_put_be32(f, s->current_tm.tm_min); 426 qemu_put_be32(f, s->current_tm.tm_hour); 427 qemu_put_be32(f, s->current_tm.tm_wday); 428 qemu_put_be32(f, s->current_tm.tm_mday); 429 qemu_put_be32(f, s->current_tm.tm_mon); 430 qemu_put_be32(f, s->current_tm.tm_year); 431 431 432 432 qemu_put_timer(f, s->periodic_timer); 433 qemu_put_be64 s(f, &s->next_periodic_time);434 435 qemu_put_be64 s(f, &s->next_second_time);433 qemu_put_be64(f, s->next_periodic_time); 434 435 qemu_put_be64(f, s->next_second_time); 436 436 qemu_put_timer(f, s->second_timer); 437 437 qemu_put_timer(f, s->second_timer2); … … 448 448 qemu_get_8s(f, &s->cmos_index); 449 449 450 qemu_get_be32s(f, &s->current_tm.tm_sec);451 qemu_get_be32s(f, &s->current_tm.tm_min);452 qemu_get_be32s(f, &s->current_tm.tm_hour);453 qemu_get_be32s(f, &s->current_tm.tm_wday);454 qemu_get_be32s(f, &s->current_tm.tm_mday);455 qemu_get_be32s(f, &s->current_tm.tm_mon);456 qemu_get_be32s(f, &s->current_tm.tm_year);450 s->current_tm.tm_sec=qemu_get_be32(f); 451 s->current_tm.tm_min=qemu_get_be32(f); 452 s->current_tm.tm_hour=qemu_get_be32(f); 453 s->current_tm.tm_wday=qemu_get_be32(f); 454 s->current_tm.tm_mday=qemu_get_be32(f); 455 s->current_tm.tm_mon=qemu_get_be32(f); 456 s->current_tm.tm_year=qemu_get_be32(f); 457 457 458 458 qemu_get_timer(f, s->periodic_timer); 459 qemu_get_be64s(f, &s->next_periodic_time);460 461 qemu_get_be64s(f, &s->next_second_time);459 s->next_periodic_time=qemu_get_be64(f); 460 461 s->next_second_time=qemu_get_be64(f); 462 462 qemu_get_timer(f, s->second_timer); 463 463 qemu_get_timer(f, s->second_timer2); -
trunk/src/host/qemu-neo1973/hw/ne2000.c
r3443 r3665 648 648 { 649 649 NE2000State* s=(NE2000State*)opaque; 650 int tmp;650 uint32_t tmp; 651 651 652 652 if (s->pci_dev) … … 680 680 NE2000State* s=(NE2000State*)opaque; 681 681 int ret; 682 int tmp;682 uint32_t tmp; 683 683 684 684 if (version_id > 3) -
trunk/src/host/qemu-neo1973/hw/pc.c
r3555 r3665 553 553 554 554 /* kernel command line */ 555 pstrcpy( cmdline_addr, 4096, kernel_cmdline);555 pstrcpy((char*)cmdline_addr, 4096, kernel_cmdline); 556 556 557 557 if (protocol >= 0x202) { -
trunk/src/host/qemu-neo1973/hw/pcnet.c
r3443 r3665 1844 1844 pci_device_save(s->pci_dev, f); 1845 1845 1846 qemu_put_be32 s(f, &s->rap);1847 qemu_put_be32 s(f, &s->isr);1848 qemu_put_be32 s(f, &s->lnkst);1846 qemu_put_be32(f, s->rap); 1847 qemu_put_be32(f, s->isr); 1848 qemu_put_be32(f, s->lnkst); 1849 1849 qemu_put_be32s(f, &s->rdra); 1850 1850 qemu_put_be32s(f, &s->tdra); … … 1855 1855 qemu_put_be16s(f, &s->bcr[i]); 1856 1856 qemu_put_be64s(f, &s->timer); 1857 qemu_put_be32 s(f, &s->xmit_pos);1858 qemu_put_be32 s(f, &s->recv_pos);1857 qemu_put_be32(f, s->xmit_pos); 1858 qemu_put_be32(f, s->recv_pos); 1859 1859 qemu_put_buffer(f, s->buffer, 4096); 1860 qemu_put_be32 s(f, &s->tx_busy);1860 qemu_put_be32(f, s->tx_busy); 1861 1861 qemu_put_timer(f, s->poll_timer); 1862 1862 } … … 1876 1876 } 1877 1877 1878 qemu_get_be32s(f, &s->rap);1879 qemu_get_be32s(f, &s->isr);1880 qemu_get_be32s(f, &s->lnkst);1878 qemu_get_be32s(f, (uint32_t*)&s->rap); 1879 qemu_get_be32s(f, (uint32_t*)&s->isr); 1880 qemu_get_be32s(f, (uint32_t*)&s->lnkst); 1881 1881 qemu_get_be32s(f, &s->rdra); 1882 1882 qemu_get_be32s(f, &s->tdra); … … 1887 1887 qemu_get_be16s(f, &s->bcr[i]); 1888 1888 qemu_get_be64s(f, &s->timer); 1889 qemu_get_be32s(f, &s->xmit_pos);1890 qemu_get_be32s(f, &s->recv_pos);1889 qemu_get_be32s(f, (uint32_t*)&s->xmit_pos); 1890 qemu_get_be32s(f, (uint32_t*)&s->recv_pos); 1891 1891 qemu_get_buffer(f, s->buffer, 4096); 1892 qemu_get_be32s(f, &s->tx_busy);1892 qemu_get_be32s(f, (uint32_t*)&s->tx_busy); 1893 1893 qemu_get_timer(f, s->poll_timer); 1894 1894 -
trunk/src/host/qemu-neo1973/hw/ps2.c
r3443 r3665 471 471 static void ps2_common_save (QEMUFile *f, PS2State *s) 472 472 { 473 qemu_put_be32 s (f, &s->write_cmd);474 qemu_put_be32 s (f, &s->queue.rptr);475 qemu_put_be32 s (f, &s->queue.wptr);476 qemu_put_be32 s (f, &s->queue.count);473 qemu_put_be32 (f, s->write_cmd); 474 qemu_put_be32 (f, s->queue.rptr); 475 qemu_put_be32 (f, s->queue.wptr); 476 qemu_put_be32 (f, s->queue.count); 477 477 qemu_put_buffer (f, s->queue.data, sizeof (s->queue.data)); 478 478 } … … 480 480 static void ps2_common_load (QEMUFile *f, PS2State *s) 481 481 { 482 qemu_get_be32s (f, &s->write_cmd);483 qemu_get_be32s (f, &s->queue.rptr);484 qemu_get_be32s (f, &s->queue.wptr);485 qemu_get_be32s (f, &s->queue.count);482 s->write_cmd=qemu_get_be32 (f); 483 s->queue.rptr=qemu_get_be32 (f); 484 s->queue.wptr=qemu_get_be32 (f); 485 s->queue.count=qemu_get_be32 (f); 486 486 qemu_get_buffer (f, s->queue.data, sizeof (s->queue.data)); 487 487 } … … 492 492 493 493 ps2_common_save (f, &s->common); 494 qemu_put_be32 s(f, &s->scan_enabled);495 qemu_put_be32 s(f, &s->translate);494 qemu_put_be32(f, s->scan_enabled); 495 qemu_put_be32(f, s->translate); 496 496 } 497 497 … … 507 507 qemu_put_8s(f, &s->mouse_type); 508 508 qemu_put_8s(f, &s->mouse_detect_state); 509 qemu_put_be32 s(f, &s->mouse_dx);510 qemu_put_be32 s(f, &s->mouse_dy);511 qemu_put_be32 s(f, &s->mouse_dz);509 qemu_put_be32(f, s->mouse_dx); 510 qemu_put_be32(f, s->mouse_dy); 511 qemu_put_be32(f, s->mouse_dz); 512 512 qemu_put_8s(f, &s->mouse_buttons); 513 513 } … … 521 521 522 522 ps2_common_load (f, &s->common); 523 qemu_get_be32s(f, &s->scan_enabled);524 qemu_get_be32s(f, &s->translate);523 s->scan_enabled=qemu_get_be32(f); 524 s->translate=qemu_get_be32(f); 525 525 return 0; 526 526 } … … 540 540 qemu_get_8s(f, &s->mouse_type); 541 541 qemu_get_8s(f, &s->mouse_detect_state); 542 qemu_get_be32s(f, &s->mouse_dx);543 qemu_get_be32s(f, &s->mouse_dy);544 qemu_get_be32s(f, &s->mouse_dz);542 s->mouse_dx=qemu_get_be32(f); 543 s->mouse_dy=qemu_get_be32(f); 544 s->mouse_dz=qemu_get_be32(f); 545 545 qemu_get_8s(f, &s->mouse_buttons); 546 546 return 0; -
trunk/src/host/qemu-neo1973/hw/pxa.h
r3443 r3665 14 14 # define PXA2XX_PIC_USBH2 2 15 15 # define PXA2XX_PIC_USBH1 3 16 # define PXA2XX_PIC_KEYPAD 4 16 17 # define PXA2XX_PIC_PWRI2C 6 17 18 # define PXA25X_PIC_HWUART 7 … … 107 108 void pxa2xx_pcmcia_set_irq_cb(void *opaque, qemu_irq irq, qemu_irq cd_irq); 108 109 110 /* pxa2xx_keypad.c */ 111 struct keymap { 112 int column; 113 int row; 114 }; 115 struct pxa2xx_keypad_s; 116 struct pxa2xx_keypad_s *pxa27x_keypad_init(target_phys_addr_t base, 117 qemu_irq irq); 118 void pxa27x_register_keypad(struct pxa2xx_keypad_s *kp, struct keymap *map, 119 int size); 120 109 121 /* pxa2xx.c */ 110 122 struct pxa2xx_ssp_s; … … 134 146 struct pxa2xx_i2s_s *i2s; 135 147 struct pxa2xx_fir_s *fir; 148 struct pxa2xx_keypad_s *kp; 136 149 137 150 /* Power management */ -
trunk/src/host/qemu-neo1973/hw/pxa2xx.c
r3555 r3665 2155 2155 s->i2s = pxa2xx_i2s_init(0x40400000, s->pic[PXA2XX_PIC_I2S], s->dma); 2156 2156 2157 s->kp = pxa27x_keypad_init(0x41500000, s->pic[PXA2XX_PIC_KEYPAD]); 2158 2157 2159 /* GPIO1 resets the processor */ 2158 2160 /* The handler can be overridden by board-specific code */ -
trunk/src/host/qemu-neo1973/hw/rtl8139.c
r3443 r3665 3120 3120 { 3121 3121 RTL8139State* s=(RTL8139State*)opaque; 3122 int i;3122 unsigned int i; 3123 3123 3124 3124 pci_device_save(s->pci_dev, f); … … 3173 3173 qemu_put_be32s(f, &i); /* unused. */ 3174 3174 qemu_put_buffer(f, s->macaddr, 6); 3175 qemu_put_be32 s(f, &s->rtl8139_mmio_io_addr);3175 qemu_put_be32(f, s->rtl8139_mmio_io_addr); 3176 3176 3177 3177 qemu_put_be32s(f, &s->currTxDesc); … … 3185 3185 qemu_put_be16s(f, &s->eeprom.contents[i]); 3186 3186 } 3187 qemu_put_be32 s(f, &s->eeprom.mode);3187 qemu_put_be32(f, s->eeprom.mode); 3188 3188 qemu_put_be32s(f, &s->eeprom.tick); 3189 3189 qemu_put_8s(f, &s->eeprom.address); … … 3198 3198 qemu_put_be32s(f, &s->TCTR); 3199 3199 qemu_put_be32s(f, &s->TimerInt); 3200 qemu_put_be64 s(f, &s->TCTR_base);3200 qemu_put_be64(f, s->TCTR_base); 3201 3201 3202 3202 RTL8139TallyCounters_save(f, &s->tally_counters); … … 3206 3206 { 3207 3207 RTL8139State* s=(RTL8139State*)opaque; 3208 int i, ret; 3208 unsigned int i; 3209 int ret; 3209 3210 3210 3211 /* just 2 versions for now */ … … 3267 3268 qemu_get_be32s(f, &i); /* unused. */ 3268 3269 qemu_get_buffer(f, s->macaddr, 6); 3269 qemu_get_be32s(f, &s->rtl8139_mmio_io_addr);3270 s->rtl8139_mmio_io_addr=qemu_get_be32(f); 3270 3271 3271 3272 qemu_get_be32s(f, &s->currTxDesc); … … 3279 3280 qemu_get_be16s(f, &s->eeprom.contents[i]); 3280 3281 } 3281 qemu_get_be32s(f, &s->eeprom.mode);3282 s->eeprom.mode=qemu_get_be32(f); 3282 3283 qemu_get_be32s(f, &s->eeprom.tick); 3283 3284 qemu_get_8s(f, &s->eeprom.address); … … 3295 3296 qemu_get_be32s(f, &s->TCTR); 3296 3297 qemu_get_be32s(f, &s->TimerInt); 3297 qemu_get_be64s(f, &s->TCTR_base);3298 s->TCTR_base=qemu_get_be64(f); 3298 3299 3299 3300 RTL8139TallyCounters_load(f, &s->tally_counters); -
trunk/src/host/qemu-neo1973/hw/sb16.c
r3443 r3665 1258 1258 SB16State *s = opaque; 1259 1259 1260 qemu_put_be32 s (f, &s->irq);1261 qemu_put_be32 s (f, &s->dma);1262 qemu_put_be32 s (f, &s->hdma);1263 qemu_put_be32 s (f, &s->port);1264 qemu_put_be32 s (f, &s->ver);1265 qemu_put_be32 s (f, &s->in_index);1266 qemu_put_be32 s (f, &s->out_data_len);1267 qemu_put_be32 s (f, &s->fmt_stereo);1268 qemu_put_be32 s (f, &s->fmt_signed);1269 qemu_put_be32 s (f, &s->fmt_bits);1260 qemu_put_be32 (f, s->irq); 1261 qemu_put_be32 (f, s->dma); 1262 qemu_put_be32 (f, s->hdma); 1263 qemu_put_be32 (f, s->port); 1264 qemu_put_be32 (f, s->ver); 1265 qemu_put_be32 (f, s->in_index); 1266 qemu_put_be32 (f, s->out_data_len); 1267 qemu_put_be32 (f, s->fmt_stereo); 1268 qemu_put_be32 (f, s->fmt_signed); 1269 qemu_put_be32 (f, s->fmt_bits); 1270 1270 qemu_put_be32s (f, &s->fmt); 1271 qemu_put_be32 s (f, &s->dma_auto);1272 qemu_put_be32 s (f, &s->block_size);1273 qemu_put_be32 s (f, &s->fifo);1274 qemu_put_be32 s (f, &s->freq);1275 qemu_put_be32 s (f, &s->time_const);1276 qemu_put_be32 s (f, &s->speaker);1277 qemu_put_be32 s (f, &s->needed_bytes);1278 qemu_put_be32 s (f, &s->cmd);1279 qemu_put_be32 s (f, &s->use_hdma);1280 qemu_put_be32 s (f, &s->highspeed);1281 qemu_put_be32 s (f, &s->can_write);1282 qemu_put_be32 s (f, &s->v2x6);1271 qemu_put_be32 (f, s->dma_auto); 1272 qemu_put_be32 (f, s->block_size); 1273 qemu_put_be32 (f, s->fifo); 1274 qemu_put_be32 (f, s->freq); 1275 qemu_put_be32 (f, s->time_const); 1276 qemu_put_be32 (f, s->speaker); 1277 qemu_put_be32 (f, s->needed_bytes); 1278 qemu_put_be32 (f, s->cmd); 1279 qemu_put_be32 (f, s->use_hdma); 1280 qemu_put_be32 (f, s->highspeed); 1281 qemu_put_be32 (f, s->can_write); 1282 qemu_put_be32 (f, s->v2x6); 1283 1283 1284 1284 qemu_put_8s (f, &s->csp_param); … … 1289 1289 qemu_put_8s (f, &s->csp_index); 1290 1290 qemu_put_buffer (f, s->csp_reg83, 4); 1291 qemu_put_be32 s (f, &s->csp_reg83r);1292 qemu_put_be32 s (f, &s->csp_reg83w);1291 qemu_put_be32 (f, s->csp_reg83r); 1292 qemu_put_be32 (f, s->csp_reg83w); 1293 1293 1294 1294 qemu_put_buffer (f, s->in2_data, sizeof (s->in2_data)); … … 1297 1297 qemu_put_8s (f, &s->last_read_byte); 1298 1298 1299 qemu_put_be32 s (f, &s->nzero);1300 qemu_put_be32 s (f, &s->left_till_irq);1301 qemu_put_be32 s (f, &s->dma_running);1302 qemu_put_be32 s (f, &s->bytes_per_second);1303 qemu_put_be32 s (f, &s->align);1304 1305 qemu_put_be32 s (f, &s->mixer_nreg);1299 qemu_put_be32 (f, s->nzero); 1300 qemu_put_be32 (f, s->left_till_irq); 1301 qemu_put_be32 (f, s->dma_running); 1302 qemu_put_be32 (f, s->bytes_per_second); 1303 qemu_put_be32 (f, s->align); 1304 1305 qemu_put_be32 (f, s->mixer_nreg); 1306 1306 qemu_put_buffer (f, s->mixer_regs, 256); 1307 1307 } … … 1315 1315 } 1316 1316 1317 qemu_get_be32s (f, &s->irq);1318 qemu_get_be32s (f, &s->dma);1319 qemu_get_be32s (f, &s->hdma);1320 qemu_get_be32s (f, &s->port);1321 qemu_get_be32s (f, &s->ver);1322 qemu_get_be32s (f, &s->in_index);1323 qemu_get_be32s (f, &s->out_data_len);1324 qemu_get_be32s (f, &s->fmt_stereo);1325 qemu_get_be32s (f, &s->fmt_signed);1326 qemu_get_be32s (f, &s->fmt_bits);1317 s->irq=qemu_get_be32 (f); 1318 s->dma=qemu_get_be32 (f); 1319 s->hdma=qemu_get_be32 (f); 1320 s->port=qemu_get_be32 (f); 1321 s->ver=qemu_get_be32 (f); 1322 s->in_index=qemu_get_be32 (f); 1323 s->out_data_len=qemu_get_be32 (f); 1324 s->fmt_stereo=qemu_get_be32 (f); 1325 s->fmt_signed=qemu_get_be32 (f); 1326 s->fmt_bits=qemu_get_be32 (f); 1327 1327 qemu_get_be32s (f, &s->fmt); 1328 qemu_get_be32s (f, &s->dma_auto);1329 qemu_get_be32s (f, &s->block_size);1330 qemu_get_be32s (f, &s->fifo);1331 qemu_get_be32s (f, &s->freq);1332 qemu_get_be32s (f, &s->time_const);1333 qemu_get_be32s (f, &s->speaker);1334 qemu_get_be32s (f, &s->needed_bytes);1335 qemu_get_be32s (f, &s->cmd);1336 qemu_get_be32s (f, &s->use_hdma);1337 qemu_get_be32s (f, &s->highspeed);1338 qemu_get_be32s (f, &s->can_write);1339 qemu_get_be32s (f, &s->v2x6);1328 s->dma_auto=qemu_get_be32 (f); 1329 s->block_size=qemu_get_be32 (f); 1330 s->fifo=qemu_get_be32 (f); 1331 s->freq=qemu_get_be32 (f); 1332 s->time_const=qemu_get_be32 (f); 1333 s->speaker=qemu_get_be32 (f); 1334 s->needed_bytes=qemu_get_be32 (f); 1335 s->cmd=qemu_get_be32 (f); 1336 s->use_hdma=qemu_get_be32 (f); 1337 s->highspeed=qemu_get_be32 (f); 1338 s->can_write=qemu_get_be32 (f); 1339 s->v2x6=qemu_get_be32 (f); 1340 1340 1341 1341 qemu_get_8s (f, &s->csp_param); … … 1346 1346 qemu_get_8s (f, &s->csp_index); 1347 1347 qemu_get_buffer (f, s->csp_reg83, 4); 1348 qemu_get_be32s (f, &s->csp_reg83r);1349 qemu_get_be32s (f, &s->csp_reg83w);1348 s->csp_reg83r=qemu_get_be32 (f); 1349 s->csp_reg83w=qemu_get_be32 (f); 1350 1350 1351 1351 qemu_get_buffer (f, s->in2_data, sizeof (s->in2_data)); … … 1354 1354 qemu_get_8s (f, &s->last_read_byte); 1355 1355 1356 qemu_get_be32s (f, &s->nzero);1357 qemu_get_be32s (f, &s->left_till_irq);1358 qemu_get_be32s (f, &s->dma_running);1359 qemu_get_be32s (f, &s->bytes_per_second);1360 qemu_get_be32s (f, &s->align);1361 1362 qemu_get_be32s (f, &s->mixer_nreg);1356 s->nzero=qemu_get_be32 (f); 1357 s->left_till_irq=qemu_get_be32 (f); 1358 s->dma_running=qemu_get_be32 (f); 1359 s->bytes_per_second=qemu_get_be32 (f); 1360 s->align=qemu_get_be32 (f); 1361 1362 s->mixer_nreg=qemu_get_be32 (f); 1363 1363 qemu_get_buffer (f, s->mixer_regs, 256); 1364 1364 -
trunk/src/host/qemu-neo1973/hw/sh.h
r3443 r3665 2 2 #define QEMU_SH_H 3 3 /* Definitions for SH board emulation. */ 4 5 #include "sh_intc.h" 4 6 5 7 /* sh7750.c */ … … 26 28 #define TMU012_FEAT_3CHAN (1 << 1) 27 29 #define TMU012_FEAT_EXTCLK (1 << 2) 28 void tmu012_init(uint32_t base, int feat, uint32_t freq); 30 void tmu012_init(target_phys_addr_t base, int feat, uint32_t freq, 31 struct intc_source *ch0_irq, struct intc_source *ch1_irq, 32 struct intc_source *ch2_irq0, struct intc_source *ch2_irq1); 33 29 34 30 35 /* sh_serial.c */ -
trunk/src/host/qemu-neo1973/hw/sh7750.c
r3555 r3665 560 560 tmu012_init(0x1fd80000, 561 561 TMU012_FEAT_TOCR | TMU012_FEAT_3CHAN | TMU012_FEAT_EXTCLK, 562 s->periph_freq); 563 562 s->periph_freq, 563 sh_intc_source(&s->intc, TMU0), 564 sh_intc_source(&s->intc, TMU1), 565 sh_intc_source(&s->intc, TMU2_TUNI), 566 sh_intc_source(&s->intc, TMU2_TICPI)); 564 567 565 568 if (cpu_model & (SH_CPU_SH7750 | SH_CPU_SH7750S | SH_CPU_SH7751)) { … … 579 582 _INTC_ARRAY(vectors_tmu34), 580 583 NULL, 0); 581 tmu012_init(0x1e100000, 0, s->periph_freq); 584 tmu012_init(0x1e100000, 0, s->periph_freq, 585 sh_intc_source(&s->intc, TMU3), 586 sh_intc_source(&s->intc, TMU4), 587 NULL, NULL); 582 588 } 583 589 -
trunk/src/host/qemu-neo1973/hw/sh_serial.c
r3443 r3665 294 294 s->smr = 0; 295 295 s->brr = 0xff; 296 s->scr = 0;296 s->scr = 1 << 5; /* pretend that TX is enabled so early printk works */ 297 297 s->sptr = 0; 298 298 -
trunk/src/host/qemu-neo1973/hw/sh_timer.c
r3443 r3665 34 34 int freq; 35 35 int int_level; 36 int old_level; 36 37 int feat; 37 38 int enabled; 38 qemu_irqirq;39 struct intc_source *irq; 39 40 } sh_timer_state; 40 41 … … 43 44 static void sh_timer_update(sh_timer_state *s) 44 45 { 45 #if 0 /* not yet */ 46 /* Update interrupts. */ 47 if (s->int_level && (s->tcr & TIMER_TCR_UNIE)) { 48 qemu_irq_raise(s->irq); 49 } else { 50 qemu_irq_lower(s->irq); 51 } 52 #endif 46 int new_level = s->int_level && (s->tcr & TIMER_TCR_UNIE); 47 48 if (new_level != s->old_level) 49 sh_intc_toggle_source(s->irq, 0, new_level ? 1 : -1); 50 51 s->old_level = s->int_level; 52 s->int_level = new_level; 53 53 } 54 54 … … 186 186 } 187 187 188 static void *sh_timer_init(uint32_t freq, int feat )188 static void *sh_timer_init(uint32_t freq, int feat, struct intc_source *irq) 189 189 { 190 190 sh_timer_state *s; … … 199 199 s->tcor = 0; 200 200 s->enabled = 0; 201 s->irq = irq; 201 202 202 203 bh = qemu_bh_new(sh_timer_tick, s); … … 306 307 }; 307 308 308 void tmu012_init(uint32_t base, int feat, uint32_t freq) 309 void tmu012_init(target_phys_addr_t base, int feat, uint32_t freq, 310 struct intc_source *ch0_irq, struct intc_source *ch1_irq, 311 struct intc_source *ch2_irq0, struct intc_source *ch2_irq1) 309 312 { 310 313 int iomemtype; … … 315 318 s->base = base; 316 319 s->feat = feat; 317 s->timer[0] = sh_timer_init(freq, timer_feat );318 s->timer[1] = sh_timer_init(freq, timer_feat );320 s->timer[0] = sh_timer_init(freq, timer_feat, ch0_irq); 321 s->timer[1] = sh_timer_init(freq, timer_feat, ch1_irq); 319 322 if (feat & TMU012_FEAT_3CHAN) 320 s->timer[2] = sh_timer_init(freq, timer_feat | TIMER_FEAT_CAPT); 323 s->timer[2] = sh_timer_init(freq, timer_feat | TIMER_FEAT_CAPT, 324 ch2_irq0); /* ch2_irq1 not supported */ 321 325 iomemtype = cpu_register_io_memory(0, tmu012_readfn, 322 326 tmu012_writefn, s); -
trunk/src/host/qemu-neo1973/hw/slavio_serial.c
r3613 r3665 90 90 } SERIOQueue; 91 91 92 #define SERIAL_REGS 16 92 93 typedef struct ChannelState { 93 94 qemu_irq irq; … … 97 98 chn_type_t type; 98 99 struct ChannelState *otherchn; 99 uint8_t rx, tx, wregs[ 16], rregs[16];100 uint8_t rx, tx, wregs[SERIAL_REGS], rregs[SERIAL_REGS]; 100 101 SERIOQueue queue; 101 102 CharDriverState *chr; … … 110 111 #define SERIAL_MAXADDR 7 111 112 #define SERIAL_SIZE (SERIAL_MAXADDR + 1) 113 #define SERIAL_CTRL 0 114 #define SERIAL_DATA 1 115 116 #define W_CMD 0 117 #define CMD_PTR_MASK 0x07 118 #define CMD_CMD_MASK 0x38 119 #define CMD_HI 0x08 120 #define CMD_CLR_TXINT 0x28 121 #define CMD_CLR_IUS 0x38 122 #define W_INTR 1 123 #define INTR_INTALL 0x01 124 #define INTR_TXINT 0x02 125 #define INTR_RXMODEMSK 0x18 126 #define INTR_RXINT1ST 0x08 127 #define INTR_RXINTALL 0x10 128 #define W_IVEC 2 129 #define W_RXCTRL 3 130 #define RXCTRL_RXEN 0x01 131 #define W_TXCTRL1 4 132 #define TXCTRL1_PAREN 0x01 133 #define TXCTRL1_PAREV 0x02 134 #define TXCTRL1_1STOP 0x04 135 #define TXCTRL1_1HSTOP 0x08 136 #define TXCTRL1_2STOP 0x0c 137 #define TXCTRL1_STPMSK 0x0c 138 #define TXCTRL1_CLK1X 0x00 139 #define TXCTRL1_CLK16X 0x40 140 #define TXCTRL1_CLK32X 0x80 141 #define TXCTRL1_CLK64X 0xc0 142 #define TXCTRL1_CLKMSK 0xc0 143 #define W_TXCTRL2 5 144 #define TXCTRL2_TXEN 0x08 145 #define TXCTRL2_BITMSK 0x60 146 #define TXCTRL2_5BITS 0x00 147 #define TXCTRL2_7BITS 0x20 148 #define TXCTRL2_6BITS 0x40 149 #define TXCTRL2_8BITS 0x60 150 #define W_SYNC1 6 151 #define W_SYNC2 7 152 #define W_TXBUF 8 153 #define W_MINTR 9 154 #define MINTR_STATUSHI 0x10 155 #define MINTR_RST_MASK 0xc0 156 #define MINTR_RST_B 0x40 157 #define MINTR_RST_A 0x80 158 #define MINTR_RST_ALL 0xc0 159 #define W_MISC1 10 160 #define W_CLOCK 11 161 #define CLOCK_TRXC 0x08 162 #define W_BRGLO 12 163 #define W_BRGHI 13 164 #define W_MISC2 14 165 #define MISC2_PLLDIS 0x30 166 #define W_EXTINT 15 167 #define EXTINT_DCD 0x08 168 #define EXTINT_SYNCINT 0x10 169 #define EXTINT_CTSINT 0x20 170 #define EXTINT_TXUNDRN 0x40 171 #define EXTINT_BRKINT 0x80 172 173 #define R_STATUS 0 174 #define STATUS_RXAV 0x01 175 #define STATUS_ZERO 0x02 176 #define STATUS_TXEMPTY 0x04 177 #define STATUS_DCD 0x08 178 #define STATUS_SYNC 0x10 179 #define STATUS_CTS 0x20 180 #define STATUS_TXUNDRN 0x40 181 #define STATUS_BRK 0x80 182 #define R_SPEC 1 183 #define SPEC_ALLSENT 0x01 184 #define SPEC_BITS8 0x06 185 #define R_IVEC 2 186 #define IVEC_TXINTB 0x00 187 #define IVEC_LONOINT 0x06 188 #define IVEC_LORXINTA 0x0c 189 #define IVEC_LORXINTB 0x04 190 #define IVEC_LOTXINTA 0x08 191 #define IVEC_HINOINT 0x60 192 #define IVEC_HIRXINTA 0x30 193 #define IVEC_HIRXINTB 0x20 194 #define IVEC_HITXINTA 0x10 195 #define R_INTR 3 196 #define INTR_EXTINTB 0x01 197 #define INTR_TXINTB 0x02 198 #define INTR_RXINTB 0x04 199 #define INTR_EXTINTA 0x08 200 #define INTR_TXINTA 0x10 201 #define INTR_RXINTA 0x20 202 #define R_IPEN 4 203 #define R_TXCTRL1 5 204 #define R_TXCTRL2 6 205 #define R_BC 7 206 #define R_RXBUF 8 207 #define R_RXCTRL 9 208 #define R_MISC 10 209 #define R_MISC1 11 210 #define R_BRGLO 12 211 #define R_BRGHI 13 212 #define R_MISC1I 14 213 #define R_EXTINT 15 112 214 113 215 static void handle_kbd_command(ChannelState *s, int val); … … 160 262 static int slavio_serial_update_irq_chn(ChannelState *s) 161 263 { 162 if ((s->wregs[1] & 1) && // interrupts enabled 163 (((s->wregs[1] & 2) && s->txint == 1) || // tx ints enabled, pending 164 ((((s->wregs[1] & 0x18) == 8) || ((s->wregs[1] & 0x18) == 0x10)) && 264 if ((s->wregs[W_INTR] & INTR_INTALL) && // interrupts enabled 265 (((s->wregs[W_INTR] & INTR_TXINT) && s->txint == 1) || 266 // tx ints enabled, pending 267 ((((s->wregs[W_INTR] & INTR_RXMODEMSK) == INTR_RXINT1ST) || 268 ((s->wregs[W_INTR] & INTR_RXMODEMSK) == INTR_RXINTALL)) && 165 269 s->rxint == 1) || // rx ints enabled, pending 166 ((s->wregs[15] & 0x80) && (s->rregs[0] & 0x80)))) { // break int e&p 270 ((s->wregs[W_EXTINT] & EXTINT_BRKINT) && 271 (s->rregs[R_STATUS] & STATUS_BRK)))) { // break int e&p 167 272 return 1; 168 273 } … … 190 295 s->wregs[i] = 0; 191 296 } 192 s->wregs[4] = 4; 193 s->wregs[9] = 0xc0; 194 s->wregs[11] = 8; 195 s->wregs[14] = 0x30; 196 s->wregs[15] = 0xf8; 297 s->wregs[W_TXCTRL1] = TXCTRL1_1STOP; // 1X divisor, 1 stop bit, no parity 298 s->wregs[W_MINTR] = MINTR_RST_ALL; 299 s->wregs[W_CLOCK] = CLOCK_TRXC; // Synch mode tx clock = TRxC 300 s->wregs[W_MISC2] = MISC2_PLLDIS; // PLL disabled 301 s->wregs[W_EXTINT] = EXTINT_DCD | EXTINT_SYNCINT | EXTINT_CTSINT | 302 EXTINT_TXUNDRN | EXTINT_BRKINT; // Enable most interrupts 197 303 if (s->disabled) 198 s->rregs[0] = 0x7c; 304 s->rregs[R_STATUS] = STATUS_TXEMPTY | STATUS_DCD | STATUS_SYNC | 305 STATUS_CTS | STATUS_TXUNDRN; 199 306 else 200 s->rregs[ 0] = 0x44;201 s->rregs[ 1] = 6;307 s->rregs[R_STATUS] = STATUS_TXEMPTY | STATUS_TXUNDRN; 308 s->rregs[R_SPEC] = SPEC_BITS8; 202 309 203 310 s->rx = s->tx = 0; … … 220 327 s->rxint_under_svc = 0; 221 328 if (s->chn == chn_a) { 222 if (s->wregs[ 9] & 0x10)223 s->otherchn->rregs[ 2] = 0x60;329 if (s->wregs[W_MINTR] & MINTR_STATUSHI) 330 s->otherchn->rregs[R_IVEC] = IVEC_HINOINT; 224 331 else 225 s->otherchn->rregs[ 2] = 0x06;226 s->rregs[ 3] &= ~0x20;332 s->otherchn->rregs[R_IVEC] = IVEC_LONOINT; 333 s->rregs[R_INTR] &= ~INTR_RXINTA; 227 334 } else { 228 if (s->wregs[ 9] & 0x10)229 s->rregs[ 2] = 0x60;335 if (s->wregs[W_MINTR] & MINTR_STATUSHI) 336 s->rregs[R_IVEC] = IVEC_HINOINT; 230 337 else 231 s->rregs[ 2] = 0x06;232 s->otherchn->rregs[ 3] &= ~4;338 s->rregs[R_IVEC] = IVEC_LONOINT; 339 s->otherchn->rregs[R_INTR] &= ~INTR_RXINTB; 233 340 } 234 341 if (s->txint) … … 243 350 s->rxint_under_svc = 1; 244 351 if (s->chn == chn_a) { 245 if (s->wregs[ 9] & 0x10)246 s->otherchn->rregs[ 2] = 0x30;352 if (s->wregs[W_MINTR] & MINTR_STATUSHI) 353 s->otherchn->rregs[R_IVEC] = IVEC_HIRXINTA; 247 354 else 248 s->otherchn->rregs[ 2] = 0x0c;355 s->otherchn->rregs[R_IVEC] = IVEC_LORXINTA; 249 356 } else { 250 if (s->wregs[ 9] & 0x10)251 s->rregs[ 2] = 0x20;357 if (s->wregs[W_MINTR] & MINTR_STATUSHI) 358 s->rregs[R_IVEC] = IVEC_HIRXINTB; 252 359 else 253 s->rregs[ 2] = 0x04;360 s->rregs[R_IVEC] = IVEC_LORXINTB; 254 361 } 255 362 } 256 363 if (s->chn == chn_a) 257 s->rregs[ 3] |= 0x20;364 s->rregs[R_INTR] |= INTR_RXINTA; 258 365 else 259 s->otherchn->rregs[ 3] |= 4;366 s->otherchn->rregs[R_INTR] |= INTR_RXINTB; 260 367 slavio_serial_update_irq(s); 261 368 } … … 266 373 s->txint_under_svc = 0; 267 374 if (s->chn == chn_a) { 268 if (s->wregs[ 9] & 0x10)269 s->otherchn->rregs[ 2] = 0x60;375 if (s->wregs[W_MINTR] & MINTR_STATUSHI) 376 s->otherchn->rregs[R_IVEC] = IVEC_HINOINT; 270 377 else 271 s->otherchn->rregs[ 2] = 0x06;272 s->rregs[ 3] &= ~0x10;378 s->otherchn->rregs[R_IVEC] = IVEC_LONOINT; 379 s->rregs[R_INTR] &= ~INTR_TXINTA; 273 380 } else { 274 if (s->wregs[ 9] & 0x10)275 s->rregs[ 2] = 0x60;381 if (s->wregs[W_MINTR] & MINTR_STATUSHI) 382 s->rregs[R_IVEC] = IVEC_HINOINT; 276 383 else 277 s->rregs[ 2] = 0x06;278 s->otherchn->rregs[ 3] &= ~2;384 s->rregs[R_IVEC] = IVEC_LONOINT; 385 s->otherchn->rregs[R_INTR] &= ~INTR_TXINTB; 279 386 } 280 387 if (s->rxint) … … 289 396 s->txint_under_svc = 1; 290 397 if (s->chn == chn_a) { 291 if (s->wregs[ 9] & 0x10)292 s->otherchn->rregs[ 2] = 0x10;398 if (s->wregs[W_MINTR] & MINTR_STATUSHI) 399 s->otherchn->rregs[R_IVEC] = IVEC_HITXINTA; 293 400 else 294 s->otherchn->rregs[ 2] = 0x08;401 s->otherchn->rregs[R_IVEC] = IVEC_LOTXINTA; 295 402 } else { 296 s->rregs[ 2] = 0;403 s->rregs[R_IVEC] = IVEC_TXINTB; 297 404 } 298 405 } 299 406 if (s->chn == chn_a) 300 s->rregs[ 3] |= 0x10;407 s->rregs[R_INTR] |= INTR_TXINTA; 301 408 else 302 s->otherchn->rregs[ 3] |= 2;409 s->otherchn->rregs[R_INTR] |= INTR_TXINTB; 303 410 slavio_serial_update_irq(s); 304 411 } … … 312 419 return; 313 420 314 if (s->wregs[ 4] & 1) {315 if (s->wregs[ 4] & 2)421 if (s->wregs[W_TXCTRL1] & TXCTRL1_PAREN) { 422 if (s->wregs[W_TXCTRL1] & TXCTRL1_PAREV) 316 423 parity = 'E'; 317 424 else … … 320 427 parity = 'N'; 321 428 } 322 if ((s->wregs[ 4] & 0x0c) == 0x0c)429 if ((s->wregs[W_TXCTRL1] & TXCTRL1_STPMSK) == TXCTRL1_2STOP) 323 430 stop_bits = 2; 324 431 else 325 432 stop_bits = 1; 326 switch (s->wregs[ 5] & 0x60) {327 case 0x00:433 switch (s->wregs[W_TXCTRL2] & TXCTRL2_BITMSK) { 434 case TXCTRL2_5BITS: 328 435 data_bits = 5; 329 436 break; 330 case 0x20:437 case TXCTRL2_7BITS: 331 438 data_bits = 7; 332 439 break; 333 case 0x40:440 case TXCTRL2_6BITS: 334 441 data_bits = 6; 335 442 break; 336 443 default: 337 case 0x60:444 case TXCTRL2_8BITS: 338 445 data_bits = 8; 339 446 break; 340 447 } 341 speed = 2457600 / ((s->wregs[ 12] | (s->wregs[13] << 8)) + 2);342 switch (s->wregs[ 4] & 0xc0) {343 case 0x00:344 break; 345 case 0x40:448 speed = 2457600 / ((s->wregs[W_BRGLO] | (s->wregs[W_BRGHI] << 8)) + 2); 449 switch (s->wregs[W_TXCTRL1] & TXCTRL1_CLKMSK) { 450 case TXCTRL1_CLK1X: 451 break; 452 case TXCTRL1_CLK16X: 346 453 speed /= 16; 347 454 break; 348 case 0x80:455 case TXCTRL1_CLK32X: 349 456 speed /= 32; 350 457 break; 351 458 default: 352 case 0xc0:459 case TXCTRL1_CLK64X: 353 460 speed /= 64; 354 461 break; … … 363 470 } 364 471 365 static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) 472 static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, 473 uint32_t val) 366 474 { 367 475 SerialState *serial = opaque; … … 375 483 s = &serial->chn[channel]; 376 484 switch (saddr) { 377 case 0: 378 SER_DPRINTF("Write channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, val & 0xff); 485 case SERIAL_CTRL: 486 SER_DPRINTF("Write channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, 487 val & 0xff); 379 488 newreg = 0; 380 489 switch (s->reg) { 381 case 0:382 newreg = val & 7;383 val &= 0x38;490 case W_CMD: 491 newreg = val & CMD_PTR_MASK; 492 val &= CMD_CMD_MASK; 384 493 switch (val) { 385 case 8:386 newreg |= 0x8;494 case CMD_HI: 495 newreg |= CMD_HI; 387 496 break; 388 case 0x28:497 case CMD_CLR_TXINT: 389 498 clr_txint(s); 390 499 break; 391 case 0x38:500 case CMD_CLR_IUS: 392 501 if (s->rxint_under_svc) 393 502 clr_rxint(s); … … 399 508 } 400 509 break; 401 case 1 ... 3:402 case 6 ... 8:403 case 10 ... 11:404 case 14 ... 15:510 case W_INTR ... W_RXCTRL: 511 case W_SYNC1 ... W_TXBUF: 512 case W_MISC1 ... W_CLOCK: 513 case W_MISC2 ... W_EXTINT: 405 514 s->wregs[s->reg] = val; 406 515 break; 407 case 4:408 case 5:409 case 12:410 case 13:516 case W_TXCTRL1: 517 case W_TXCTRL2: 518 case W_BRGLO: 519 case W_BRGHI: 411 520 s->wregs[s->reg] = val; 412 521 slavio_serial_update_parameters(s); 413 522 break; 414 case 9:415 switch (val & 0xc0) {523 case W_MINTR: 524 switch (val & MINTR_RST_MASK) { 416 525 case 0: 417 526 default: 418 527 break; 419 case 0x40:528 case MINTR_RST_B: 420 529 slavio_serial_reset_chn(&serial->chn[1]); 421 530 return; 422 case 0x80:531 case MINTR_RST_A: 423 532 slavio_serial_reset_chn(&serial->chn[0]); 424 533 return; 425 case 0xc0:534 case MINTR_RST_ALL: 426 535 slavio_serial_reset(serial); 427 536 return; … … 436 545 s->reg = 0; 437 546 break; 438 case 1:547 case SERIAL_DATA: 439 548 SER_DPRINTF("Write channel %c, ch %d\n", CHN_C(s), val); 440 549 s->tx = val; 441 if (s->wregs[ 5] & 8) { // tx enabled550 if (s->wregs[W_TXCTRL2] & TXCTRL2_TXEN) { // tx enabled 442 551 if (s->chr) 443 552 qemu_chr_write(s->chr, &s->tx, 1); … … 446 555 } 447 556 } 448 s->rregs[ 0] |= 4; // Tx buffer empty449 s->rregs[ 1] |= 1; // All sent557 s->rregs[R_STATUS] |= STATUS_TXEMPTY; // Tx buffer empty 558 s->rregs[R_SPEC] |= SPEC_ALLSENT; // All sent 450 559 set_txint(s); 451 560 break; … … 467 576 s = &serial->chn[channel]; 468 577 switch (saddr) { 469 case 0: 470 SER_DPRINTF("Read channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, s->rregs[s->reg]); 578 case SERIAL_CTRL: 579 SER_DPRINTF("Read channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, 580 s->rregs[s->reg]); 471 581 ret = s->rregs[s->reg]; 472 582 s->reg = 0; 473 583 return ret; 474 case 1:475 s->rregs[ 0] &= ~1;584 case SERIAL_DATA: 585 s->rregs[R_STATUS] &= ~STATUS_RXAV; 476 586 clr_rxint(s); 477 587 if (s->type == kbd || s->type == mouse) … … 494 604 int ret; 495 605 496 if (((s->wregs[3] & 1) == 0) // Rx not enabled 497 || ((s->rregs[0] & 1) == 1)) // char already available 606 if (((s->wregs[W_RXCTRL] & RXCTRL_RXEN) == 0) // Rx not enabled 607 || ((s->rregs[R_STATUS] & STATUS_RXAV) == STATUS_RXAV)) 608 // char already available 498 609 ret = 0; 499 610 else 500 611 ret = 1; 501 //SER_DPRINTF("channel %c can receive %d\n", CHN_C(s), ret);502 612 return ret; 503 613 } … … 506 616 { 507 617 SER_DPRINTF("channel %c put ch %d\n", CHN_C(s), ch); 508 s->rregs[ 0] |= 1;618 s->rregs[R_STATUS] |= STATUS_RXAV; 509 619 s->rx = ch; 510 620 set_rxint(s); … … 513 623 static void serial_receive_break(ChannelState *s) 514 624 { 515 s->rregs[ 0] |= 0x80;625 s->rregs[R_STATUS] |= STATUS_BRK; 516 626 slavio_serial_update_irq(s); 517 627 } … … 554 664 qemu_put_8s(f, &s->rx); 555 665 qemu_put_8s(f, &s->tx); 556 qemu_put_buffer(f, s->wregs, 16);557 qemu_put_buffer(f, s->rregs, 16);666 qemu_put_buffer(f, s->wregs, SERIAL_REGS); 667 qemu_put_buffer(f, s->rregs, SERIAL_REGS); 558 668 } 559 669 … … 583 693 qemu_get_8s(f, &s->rx); 584 694 qemu_get_8s(f, &s->tx); 585 qemu_get_buffer(f, s->wregs, 16);586 qemu_get_buffer(f, s->rregs, 16);695 qemu_get_buffer(f, s->wregs, SERIAL_REGS); 696 qemu_get_buffer(f, s->rregs, SERIAL_REGS); 587 697 return 0; 588 698 } … … 611 721 return NULL; 612 722 613 slavio_serial_io_memory = cpu_register_io_memory(0, slavio_serial_mem_read, slavio_serial_mem_write, s); 723 slavio_serial_io_memory = cpu_register_io_memory(0, slavio_serial_mem_read, 724 slavio_serial_mem_write, 725 s); 614 726 cpu_register_physical_memory(base, SERIAL_SIZE, slavio_serial_io_memory); 615 727 … … 630 742 s->chn[0].otherchn = &s->chn[1]; 631 743 s->chn[1].otherchn = &s->chn[0]; 632 register_savevm("slavio_serial", base, 2, slavio_serial_save, slavio_serial_load, s); 744 register_savevm("slavio_serial", base, 2, slavio_serial_save, 745 slavio_serial_load, s); 633 746 qemu_register_reset(slavio_serial_reset, s); 634 747 slavio_serial_reset(s); … … 663 776 int release = ch & 0x80; 664 777 665 KBD_DPRINTF("Untranslated keycode %2.2x (%s)\n", ch, release? "release" : "press"); 778 KBD_DPRINTF("Untranslated keycode %2.2x (%s)\n", ch, release? "release" : 779 "press"); 666 780 switch (ch) { 667 781 case 58: // Caps lock press … … 793 907 s->chn[1].disabled = disabled; 794 908 795 slavio_serial_io_memory = cpu_register_io_memory(0, slavio_serial_mem_read, slavio_serial_mem_write, s); 909 slavio_serial_io_memory = cpu_register_io_memory(0, slavio_serial_mem_read, 910 slavio_serial_mem_write, 911 s); 796 912 cpu_register_physical_memory(base, SERIAL_SIZE, slavio_serial_io_memory); 797 913 798 qemu_add_mouse_event_handler(sunmouse_event, &s->chn[0], 0, "QEMU Sun Mouse"); 914 qemu_add_mouse_event_handler(sunmouse_event, &s->chn[0], 0, 915 "QEMU Sun Mouse"); 799 916 qemu_add_kbd_event_handler(sunkbd_event, &s->chn[1]); 800 register_savevm("slavio_serial_mouse", base, 2, slavio_serial_save, slavio_serial_load, s); 917 register_savevm("slavio_serial_mouse", base, 2, slavio_serial_save, 918 slavio_serial_load, s); 801 919 qemu_register_reset(slavio_serial_reset, s); 802 920 slavio_serial_reset(s); -
trunk/src/host/qemu-neo1973/hw/sun4m.c
r3627 r3665 601 601 .default_cpu_model = "TI SuperSparc II", 602 602 }, 603 /* SS-20 */ 604 { 605 .iommu_base = 0xfe0000000ULL, 606 .tcx_base = 0xe20000000ULL, 607 .cs_base = -1, 608 .slavio_base = 0xff0000000ULL, 609 .ms_kb_base = 0xff1000000ULL, 610 .serial_base = 0xff1100000ULL, 611 .nvram_base = 0xff1200000ULL, 612 .fd_base = 0xff1700000ULL, 613 .counter_base = 0xff1300000ULL, 614 .intctl_base = 0xff1400000ULL, 615 .dma_base = 0xef0400000ULL, 616 .esp_base = 0xef0800000ULL, 617 .le_base = 0xef0c00000ULL, 618 .power_base = 0xefa000000ULL, 619 .ecc_base = 0xf00000000ULL, 620 .ecc_version = 0x20000000, // version 0, implementation 2 621 .vram_size = 0x00100000, 622 .nvram_size = 0x2000, 623 .esp_irq = 18, 624 .le_irq = 16, 625 .clock_irq = 7, 626 .clock1_irq = 19, 627 .ms_kb_irq = 14, 628 .ser_irq = 15, 629 .fd_irq = 22, 630 .me_irq = 30, 631 .cs_irq = -1, 632 .machine_id = 0x72, 633 .iommu_version = 0x13000000, 634 .intbit_to_level = { 635 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12, 636 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0, 637 }, 638 .max_mem = 0xffffffff, // XXX actually first 62GB ok 639 .default_cpu_model = "TI SuperSparc II", 640 }, 603 641 }; 604 642 … … 633 671 } 634 672 673 /* SPARCstation 20 hardware initialisation */ 674 static void ss20_init(int RAM_size, int vga_ram_size, 675 const char *boot_device, DisplayState *ds, 676 const char *kernel_filename, const char *kernel_cmdline, 677 const char *initrd_filename, const char *cpu_model) 678 { 679 sun4m_hw_init(&hwdefs[3], RAM_size, boot_device, ds, kernel_filename, 680 kernel_cmdline, initrd_filename, cpu_model); 681 } 682 635 683 QEMUMachine ss5_machine = { 636 684 "SS-5", … … 650 698 ss600mp_init, 651 699 }; 700 701 QEMUMachine ss20_machine = { 702 "SS-20", 703 "Sun4m platform, SPARCstation 20", 704 ss20_init, 705 }; 706 -
trunk/src/host/qemu-neo1973/hw/usb-uhci.c
r3443 r3665 509 509 1 if TD unsuccessful or inactive 510 510 */ 511 static int uhci_handle_td(UHCIState *s, UHCI_TD *td, int *int_mask,511 static int uhci_handle_td(UHCIState *s, UHCI_TD *td, uint32_t *int_mask, 512 512 int completion) 513 513 { … … 734 734 UHCIState *s = opaque; 735 735 int64_t expire_time; 736 uint32_t frame_addr, link, old_td_ctrl, val ;737 int int_mask,cnt, ret;736 uint32_t frame_addr, link, old_td_ctrl, val, int_mask; 737 int cnt, ret; 738 738 UHCI_TD td; 739 739 UHCI_QH qh; -
trunk/src/host/qemu-neo1973/hw/vga.c
r3443 r3665 1688 1688 qemu_put_8s(f, &s->ar_index); 1689 1689 qemu_put_buffer(f, s->ar, 21); 1690 qemu_put_be32 s(f, &s->ar_flip_flop);1690 qemu_put_be32(f, s->ar_flip_flop); 1691 1691 qemu_put_8s(f, &s->cr_index); 1692 1692 qemu_put_buffer(f, s->cr, 256); 1693 1693 qemu_put_8s(f, &s->msr); 1694 1694 qemu_put_8s(f, &s->fcr); 1695 qemu_put_ 8s(f, &s->st00);1695 qemu_put_byte(f, s->st00); 1696 1696 qemu_put_8s(f, &s->st01); 1697 1697 … … 1703 1703 qemu_put_buffer(f, s->palette, 768); 1704 1704 1705 qemu_put_be32 s(f, &s->bank_offset);1705 qemu_put_be32(f, s->bank_offset); 1706 1706 #ifdef CONFIG_BOCHS_VBE 1707 1707 qemu_put_byte(f, 1); … … 1738 1738 qemu_get_8s(f, &s->ar_index); 1739 1739 qemu_get_buffer(f, s->ar, 21); 1740 qemu_get_be32s(f, &s->ar_flip_flop);1740 s->ar_flip_flop=qemu_get_be32(f); 1741 1741 qemu_get_8s(f, &s->cr_index); 1742 1742 qemu_get_buffer(f, s->cr, 256); … … 1753 1753 qemu_get_buffer(f, s->palette, 768); 1754 1754 1755 qemu_get_be32s(f, &s->bank_offset);1755 s->bank_offset=qemu_get_be32(f); 1756 1756 is_vbe = qemu_get_byte(f); 1757 1757 #ifdef CONFIG_BOCHS_VBE -
trunk/src/host/qemu-neo1973/hw/vmware_vga.c
r3443 r3665 1029 1029 static void vmsvga_save(struct vmsvga_state_s *s, QEMUFile *f) 1030 1030 { 1031 qemu_put_be32 s(f, &s->depth);1032 qemu_put_be32 s(f, &s->enable);1033 qemu_put_be32 s(f, &s->config);1034 qemu_put_be32 s(f, &s->cursor.id);1035 qemu_put_be32 s(f, &s->cursor.x);1036 qemu_put_be32 s(f, &s->cursor.y);1037 qemu_put_be32 s(f, &s->cursor.on);1038 qemu_put_be32 s(f, &s->index);1031 qemu_put_be32(f, s->depth); 1032 qemu_put_be32(f, s->enable); 1033 qemu_put_be32(f, s->config); 1034 qemu_put_be32(f, s->cursor.id); 1035 qemu_put_be32(f, s->cursor.x); 1036 qemu_put_be32(f, s->cursor.y); 1037 qemu_put_be32(f, s->cursor.on); 1038 qemu_put_be32(f, s->index); 1039 1039 qemu_put_buffer(f, (uint8_t *) s->scratch, s->scratch_size * 4); 1040 qemu_put_be32 s(f, &s->new_width);1041 qemu_put_be32 s(f, &s->new_height);1040 qemu_put_be32(f, s->new_width); 1041 qemu_put_be32(f, s->new_height); 1042 1042 qemu_put_be32s(f, &s->guest); 1043 1043 qemu_put_be32s(f, &s->svgaid); 1044 qemu_put_be32 s(f, &s->syncing);1045 qemu_put_be32 s(f, &s->fb_size);1044 qemu_put_be32(f, s->syncing); 1045 qemu_put_be32(f, s->fb_size); 1046 1046 } 1047 1047 … … 1049 1049 { 1050 1050 int depth; 1051 qemu_get_be32s(f, &depth);1052 qemu_get_be32s(f, &s->enable);1053 qemu_get_be32s(f, &s->config);1054 qemu_get_be32s(f, &s->cursor.id);1055 qemu_get_be32s(f, &s->cursor.x);1056 qemu_get_be32s(f, &s->cursor.y);1057 qemu_get_be32s(f, &s->cursor.on);1058 qemu_get_be32s(f, &s->index);1051 depth=qemu_get_be32(f); 1052 s->enable=qemu_get_be32(f); 1053 s->config=qemu_get_be32(f); 1054 s->cursor.id=qemu_get_be32(f); 1055 s->cursor.x=qemu_get_be32(f); 1056 s->cursor.y=qemu_get_be32(f); 1057 s->cursor.on=qemu_get_be32(f); 1058 s->index=qemu_get_be32(f); 1059 1059 qemu_get_buffer(f, (uint8_t *) s->scratch, s->scratch_size * 4); 1060 qemu_get_be32s(f, &s->new_width);1061 qemu_get_be32s(f, &s->new_height);1060 s->new_width=qemu_get_be32(f); 1061 s->new_height=qemu_get_be32(f); 1062 1062 qemu_get_be32s(f, &s->guest); 1063 1063 qemu_get_be32s(f, &s->svgaid); 1064 qemu_get_be32s(f, &s->syncing);1065 qemu_get_be32s(f, &s->fb_size);1064 s->syncing=qemu_get_be32(f); 1065 s->fb_size=qemu_get_be32(f); 1066 1066 1067 1067 if (s->enable && depth != s->depth) { -
trunk/src/host/qemu-neo1973/linux-user/main.c
r3555 r3665 1907 1907 "-d options activate log (logfile=%s)\n" 1908 1908 "-p pagesize set the host page size to 'pagesize'\n" 1909 "-strace log system calls\n", 1909 "-strace log system calls\n" 1910 "\n" 1911 "environment variables:\n" 1912 "QEMU_STRACE Print system calls and arguments similar to the\n" 1913 " 'strace' program. Enable by setting to any value.\n" 1914 , 1910 1915 TARGET_ARCH, 1911 1916 interp_prefix, -
trunk/src/host/qemu-neo1973/linux-user/mmap.c
r3443 r3665 163 163 Return -1 if error. 164 164 */ 165 /* XXX: should markpages used by the host as reserved to be sure not165 /* page_init() marks pages used by the host as reserved to be sure not 166 166 to use them. */ 167 167 static abi_ulong mmap_find_vma(abi_ulong start, abi_ulong size) -
trunk/src/host/qemu-neo1973/linux-user/syscall.c
r3627 r3665 3178 3178 ret = get_errno(sys_unlinkat(arg1, p, arg3)); 3179 3179 unlock_user(p, arg2, 0); 3180 break; 3180 3181 #endif 3181 3182 case TARGET_NR_execve: -
trunk/src/host/qemu-neo1973/monitor.c
r3555 r3665 78 78 static term_cmd_t modem_cmds[]; 79 79 80 static charterm_outbuf[1024];80 static uint8_t term_outbuf[1024]; 81 81 static int term_outbuf_index; 82 82 … … 99 99 void term_puts(const char *str) 100 100 { 101 intc;101 char c; 102 102 for(;;) { 103 103 c = *str++; -
trunk/src/host/qemu-neo1973/osdep.h
r3443 r3665 57 57 58 58 #ifdef _WIN32 59 int ffs(int i); 60 59 61 typedef struct { 60 62 long tv_sec; -
trunk/src/host/qemu-neo1973/pc-bios/README
r3443 r3665 16 16 1275-1994 (referred to as Open Firmware) compliant firmware. 17 17 The included Sparc32 and Sparc64 images are built from SVN 18 revision 1 76.18 revision 181. 19 19 20 20 - The PXE roms come from Rom-o-Matic etherboot 5.4.2. -
trunk/src/host/qemu-neo1973/qemu-doc.texi
r3517 r3665 227 227 @option{-cdrom} at the same time). You can use the host CD-ROM by 228 228 using @file{/dev/cdrom} as filename (@pxref{host_drives}). 229 230 @item -drive @var{option}[,@var{option}[,@var{option}[,...]]] 231 232 Define a new drive. Valid options are: 233 234 @table @code 235 @item file=@var{file} 236 This option defines which disk image (@pxref{disk_images}) to use with 237 this drive. 238 @item if=@var{interface} 239 This option defines on which type on interface the drive is connected. 240 Available types are: ide, scsi, sd, mtd, floppy, pflash. 241 @item bus=@var{bus},unit=@var{unit} 242 These options define where is connected the drive by defining the bus number and 243 the unit id. 244 @item index=@var{index} 245 This option defines where is connected the drive by using an index in the list 246 of available connectors of a given interface type. 247 @item media=@var{media} 248 This option defines the type of the media: disk or cdrom. 249 @item cyls=@var{c},heads=@var{h},secs=@var{s}[,trans=@var{t}] 250 These options have the same definition as they have in @option{-hdachs}. 251 @item snapshot=@var{snapshot} 252 @var{snapshot} is "on" or "off" and allows to enable snapshot for given drive (see @option{-snapshot}). 253 @end table 254 255 Instead of @option{-cdrom} you can use: 256 @example 257 qemu -drive file=file,index=2,media=cdrom 258 @end example 259 260 Instead of @option{-hda}, @option{-hdb}, @option{-hdc}, @option{-hdd}, you can 261 use: 262 @example 263 qemu -drive file=file,index=0,media=disk 264 qemu -drive file=file,index=1,media=disk 265 qemu -drive file=file,index=2,media=disk 266 qemu -drive file=file,index=3,media=disk 267 @end example 268 269 You can connect a CDROM to the slave of ide0: 270 @example 271 qemu -drive file=file,if=ide,index=1,media=cdrom 272 @end example 273 274 If you don't specify the "file=" argument, you define an empty drive: 275 @example 276 qemu -drive if=ide,index=1,media=cdrom 277 @end example 278 279 You can connect a SCSI disk with unit ID 6 on the bus #0: 280 @example 281 qemu -drive file=file,if=scsi,bus=0,unit=6 282 @end example 283 284 Instead of @option{-fda}, @option{-fdb}, you can use: 285 @example 286 qemu -drive file=file,index=0,if=floppy 287 qemu -drive file=file,index=1,if=floppy 288 @end example 289 290 By default, @var{interface} is "ide" and @var{index} is automatically 291 incremented: 292 @example 293 qemu -drive file=a -drive file=b" 294 @end example 295 is interpreted like: 296 @example 297 qemu -hda a -hdb b 298 @end example 229 299 230 300 @item -boot [a|c|d|n] … … 2438 2508 @end table 2439 2509 2510 Environment variables: 2511 2512 @table @env 2513 @item QEMU_STRACE 2514 Print system calls and arguments similar to the 'strace' program 2515 (NOTE: the actual 'strace' program will not work because the user 2516 space emulator hasn't implemented ptrace). At the moment this is 2517 incomplete. All system calls that don't have a specific argument 2518 format are printed with information for six arguments. Many 2519 flag-style arguments don't have decoders and will show up as numbers. 2520 2440 2521 @node Other binaries 2441 2522 @subsection Other binaries -
trunk/src/host/qemu-neo1973/target-sparc/op.c
r3517 r3665 1245 1245 env->exception_index = PARAM1; 1246 1246 cpu_loop_exit(); 1247 FORCE_RET(); 1247 1248 } 1248 1249 … … 1251 1252 env->exception_index = TT_TRAP + (T0 & 0x7f); 1252 1253 cpu_loop_exit(); 1254 FORCE_RET(); 1253 1255 } 1254 1256 -
trunk/src/host/qemu-neo1973/target-sparc/op_helper.c
r3555 r3665 412 412 } 413 413 break; 414 case 0x39: /* data cache diagnostic register */ 415 ret = 0; 416 break; 414 417 case 0x21 ... 0x2d: /* MMU passthrough, unassigned */ 415 418 default: … … 704 707 } 705 708 return; 706 case 0x31: /* Ross RT620 I-cache flush */ 709 case 0x30: /* store buffer tags */ 710 case 0x31: /* store buffer data or Ross RT620 I-cache flush */ 711 case 0x32: /* store buffer control */ 707 712 case 0x36: /* I-cache flash clear */ 708 713 case 0x37: /* D-cache flash clear */ 714 case 0x38: /* breakpoint diagnostics */ 715 case 0x4c: /* breakpoint action */ 709 716 break; 710 717 case 9: /* Supervisor code access, XXX */ -
trunk/src/host/qemu-neo1973/translate-all.c
r3555 r3665 133 133 } 134 134 135 unsigned long code_gen_max_block_size(void) 136 { 137 static unsigned long max; 138 139 if (max == 0) { 140 #define DEF(s, n, copy_size) max = copy_size > max? copy_size : max; 141 #include "opc.h" 142 #undef DEF 143 max *= OPC_MAX_SIZE; 144 } 145 146 return max; 147 } 148 135 149 /* return non zero if the very first instruction is invalid so that 136 150 the virtual CPU can trigger an exception. … … 139 153 code). 140 154 */ 141 int cpu_gen_code(CPUState *env, TranslationBlock *tb, 142 int max_code_size, int *gen_code_size_ptr) 155 int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr) 143 156 { 144 157 uint8_t *gen_code_buf; -
trunk/src/host/qemu-neo1973/vl.c
r3616 r3665 238 238 static CPUState *cur_cpu; 239 239 static CPUState *next_cpu; 240 static int event_pending ;240 static int event_pending = 1; 241 241 242 242 #define TFR(expr) do { if ((expr) != -1) break; } while (errno == EINTR) … … 829 829 830 830 #define ALARM_FLAG_DYNTICKS 0x1 831 #define ALARM_FLAG_MODIFIED 0x2 831 832 832 833 static inline int alarm_has_dynticks(struct qemu_alarm_timer *t) … … 839 840 if (!alarm_has_dynticks(t)) 840 841 return; 842 843 if (!(t->flags & ALARM_FLAG_MODIFIED)) 844 return; 845 846 t->flags &= ~(ALARM_FLAG_MODIFIED); 841 847 842 848 t->rearm(t); … … 1012 1018 { 1013 1019 QEMUTimer **pt, *t; 1020 1021 alarm_timer->flags |= ALARM_FLAG_MODIFIED; 1014 1022 1015 1023 /* NOTE: this code must be signal safe because … … 1093 1101 ts->cb(ts->opaque); 1094 1102 } 1095 qemu_rearm_alarm_timer(alarm_timer);1096 1103 } 1097 1104 … … 1145 1152 hw_error("cannot save state if virtual timers are running"); 1146 1153 } 1147 qemu_put_be64 s(f, &cpu_ticks_offset);1148 qemu_put_be64 s(f, &ticks_per_sec);1149 qemu_put_be64 s(f, &cpu_clock_offset);1154 qemu_put_be64(f, cpu_ticks_offset); 1155 qemu_put_be64(f, ticks_per_sec); 1156 qemu_put_be64(f, cpu_clock_offset); 1150 1157 } 1151 1158 … … 1157 1164 return -EINVAL; 1158 1165 } 1159 qemu_get_be64s(f, &cpu_ticks_offset);1160 qemu_get_be64s(f, &ticks_per_sec);1166 cpu_ticks_offset=qemu_get_be64(f); 1167 ticks_per_sec=qemu_get_be64(f); 1161 1168 if (version_id == 2) { 1162 qemu_get_be64s(f, &cpu_clock_offset);1169 cpu_clock_offset=qemu_get_be64(f); 1163 1170 } 1164 1171 return 0; … … 1216 1223 return; 1217 1224 1218 /* stop the currently executing cpu because a timer occured */ 1219 cpu_interrupt(env, CPU_INTERRUPT_EXIT); 1225 if (env) { 1226 alarm_timer->flags |= ALARM_FLAG_MODIFIED; 1227 /* stop the currently executing cpu because a timer occured */ 1228 cpu_interrupt(env, CPU_INTERRUPT_EXIT); 1220 1229 #ifdef USE_KQEMU 1221 if (env->kqemu_enabled) { 1222 kqemu_cpu_interrupt(env); 1223 } 1224 #endif 1230 if (env->kqemu_enabled) { 1231 kqemu_cpu_interrupt(env); 1232 } 1233 #endif 1234 } 1225 1235 event_pending = 1; 1226 1236 } … … 1640 1650 va_start(ap, fmt); 1641 1651 vsnprintf(buf, sizeof(buf), fmt, ap); 1642 qemu_chr_write(s, buf, strlen(buf));1652 qemu_chr_write(s, (uint8_t *)buf, strlen(buf)); 1643 1653 va_end(ap); 1644 1654 } … … 1729 1739 secs % 60, 1730 1740 (int)((ti / 1000000) % 1000)); 1731 d->drv->chr_write(d->drv, buf1, strlen(buf1));1741 d->drv->chr_write(d->drv, (uint8_t *)buf1, strlen(buf1)); 1732 1742 } 1733 1743 } … … 1758 1768 sprintf(ebuf,"C-%c", term_escape_char - 1 + 'a'); 1759 1769 } else { 1760 sprintf(cbuf,"\n\rEscape-Char set to Ascii: 0x%02x\n\r\n\r", term_escape_char); 1761 } 1762 chr->chr_write(chr, cbuf, strlen(cbuf)); 1770 sprintf(cbuf,"\n\rEscape-Char set to Ascii: 0x%02x\n\r\n\r", 1771 term_escape_char); 1772 } 1773 chr->chr_write(chr, (uint8_t *)cbuf, strlen(cbuf)); 1763 1774 for (i = 0; mux_help[i] != NULL; i++) { 1764 1775 for (j=0; mux_help[i][j] != '\0'; j++) { 1765 1776 if (mux_help[i][j] == '%') 1766 chr->chr_write(chr, ebuf, strlen(ebuf));1777 chr->chr_write(chr, (uint8_t *)ebuf, strlen(ebuf)); 1767 1778 else 1768 chr->chr_write(chr, &mux_help[i][j], 1);1779 chr->chr_write(chr, (uint8_t *)&mux_help[i][j], 1); 1769 1780 } 1770 1781 } … … 1785 1796 { 1786 1797 char *term = "QEMU: Terminated\n\r"; 1787 chr->chr_write(chr, term,strlen(term));1798 chr->chr_write(chr,(uint8_t *)term,strlen(term)); 1788 1799 exit(0); 1789 1800 break; … … 2906 2917 int fd; 2907 2918 struct sockaddr_in daddr; 2908 charbuf[1024];2919 uint8_t buf[1024]; 2909 2920 int bufcnt; 2910 2921 int bufptr; … … 3064 3075 static void tcp_chr_process_IAC_bytes(CharDriverState *chr, 3065 3076 TCPCharDriver *s, 3066 char*buf, int *size)3077 uint8_t *buf, int *size) 3067 3078 { 3068 3079 /* Handle any telnet client's basic IAC options to satisfy char by … … 3482 3493 { 3483 3494 int i; 3484 for(i = 0; i < 6; i++) { 3485 macaddr[i] = strtol(p, (char **)&p, 16); 3486 if (i == 5) { 3487 if (*p != '\0') 3488 return -1; 3489 } else { 3490 if (*p != ':') 3491 return -1; 3492 p++; 3493 } 3494 } 3495 return 0; 3495 char *last_char; 3496 long int offset; 3497 3498 errno = 0; 3499 offset = strtol(p, &last_char, 0); 3500 if (0 == errno && '\0' == *last_char && 3501 offset >= 0 && offset <= 0xFFFFFF) { 3502 macaddr[3] = (offset & 0xFF0000) >> 16; 3503 macaddr[4] = (offset & 0xFF00) >> 8; 3504 macaddr[5] = offset & 0xFF; 3505 return 0; 3506 } else { 3507 for(i = 0; i < 6; i++) { 3508 macaddr[i] = strtol(p, (char **)&p, 16); 3509 if (i == 5) { 3510 if (*p != '\0') 3511 return -1; 3512 } else { 3513 if (*p != ':' && *p != '-') 3514 return -1; 3515 p++; 3516 } 3517 } 3518 return 0; 3519 } 3520 3521 return -1; 3496 3522 } 3497 3523 … … 6034 6060 len = strlen(se->idstr); 6035 6061 qemu_put_byte(f, len); 6036 qemu_put_buffer(f, se->idstr, len);6062 qemu_put_buffer(f, (uint8_t *)se->idstr, len); 6037 6063 6038 6064 qemu_put_be32(f, se->instance_id); … … 6095 6121 break; 6096 6122 len = qemu_get_byte(f); 6097 qemu_get_buffer(f, idstr, len);6123 qemu_get_buffer(f, (uint8_t *)idstr, len); 6098 6124 idstr[len] = '\0'; 6099 6125 instance_id = qemu_get_be32(f); … … 7601 7627 qemu_run_timers(&active_timers[QEMU_TIMER_REALTIME], 7602 7628 qemu_get_clock(rt_clock)); 7629 7630 qemu_rearm_alarm_timer(alarm_timer); 7603 7631 7604 7632 /* Check bottom-halves last in case any of the earlier events triggered … … 8097 8125 qemu_register_machine(&ss10_machine); 8098 8126 qemu_register_machine(&ss600mp_machine); 8127 qemu_register_machine(&ss20_machine); 8099 8128 #endif 8100 8129 #elif defined(TARGET_ARM) … … 8527 8556 { 8528 8557 /* Could easily be extended to 64 devices if needed */ 8529 const unsignedchar *p;8558 const char *p; 8530 8559 8531 8560 boot_devices_bitmap = 0; … … 8996 9025 8997 9026 #ifdef TARGET_I386 8998 /* XXX: this should be moved in the PC machine instan ciation code */9027 /* XXX: this should be moved in the PC machine instantiation code */ 8999 9028 if (net_boot != 0) { 9000 9029 int netroms = 0; -
trunk/src/host/qemu-neo1973/vnc.c
r3443 r3665 61 61 size_t capacity; 62 62 size_t offset; 63 char*buffer;63 uint8_t *buffer; 64 64 } Buffer; 65 65 66 66 typedef struct VncState VncState; 67 67 68 typedef int VncReadEvent(VncState *vs, char*data, size_t len);68 typedef int VncReadEvent(VncState *vs, uint8_t *data, size_t len); 69 69 70 70 typedef void VncWritePixels(VncState *vs, void *data, int size); … … 258 258 259 259 h += y; 260 261 /* round x down to ensure the loop only spans one 16-pixel block per, 262 iteration. otherwise, if (x % 16) != 0, the last iteration may span 263 two 16-pixel blocks but we only mark the first as dirty 264 */ 265 w += (x % 16); 266 x -= (x % 16); 260 267 261 268 for (; y < h; y++) … … 370 377 { 371 378 int i; 372 char*row;379 uint8_t *row; 373 380 374 381 vnc_framebuffer_update(vs, x, y, w, h, 0); … … 434 441 { 435 442 int src, dst; 436 char*src_row;437 char*dst_row;443 uint8_t *src_row; 444 uint8_t *dst_row; 438 445 char *old_row; 439 446 int y = 0; … … 493 500 if (vs->need_update && vs->csock != -1) { 494 501 int y; 495 char*row;502 uint8_t *row; 496 503 char *old_row; 497 504 uint32_t width_mask[VNC_DIRTY_WORDS]; … … 510 517 if (vnc_and_bits(vs->dirty_row[y], width_mask, VNC_DIRTY_WORDS)) { 511 518 int x; 512 char *ptr, *old_ptr; 519 uint8_t *ptr; 520 char *old_ptr; 513 521 514 522 ptr = row; 515 old_ptr = old_row;523 old_ptr = (char*)old_row; 516 524 517 525 for (x = 0; x < vs->ds->width; x += 16) { … … 616 624 } 617 625 618 static char*buffer_end(Buffer *buffer)626 static uint8_t *buffer_end(Buffer *buffer) 619 627 { 620 628 return buffer->buffer + buffer->offset; … … 847 855 #endif /* CONFIG_VNC_TLS */ 848 856 849 static void client_cut_text(VncState *vs, size_t len, char*text)857 static void client_cut_text(VncState *vs, size_t len, uint8_t *text) 850 858 { 851 859 } … … 1175 1183 } 1176 1184 1177 static int protocol_client_msg(VncState *vs, char*data, size_t len)1185 static int protocol_client_msg(VncState *vs, uint8_t *data, size_t len) 1178 1186 { 1179 1187 int i; … … 1248 1256 } 1249 1257 1250 static int protocol_client_init(VncState *vs, char*data, size_t len)1258 static int protocol_client_init(VncState *vs, uint8_t *data, size_t len) 1251 1259 { 1252 1260 char pad[3] = { 0, 0, 0 }; … … 1321 1329 } 1322 1330 1323 static int protocol_client_auth_vnc(VncState *vs, char*data, size_t len)1324 { 1325 char response[VNC_AUTH_CHALLENGE_SIZE];1331 static int protocol_client_auth_vnc(VncState *vs, uint8_t *data, size_t len) 1332 { 1333 unsigned char response[VNC_AUTH_CHALLENGE_SIZE]; 1326 1334 int i, j, pwlen; 1327 char key[8];1335 unsigned char key[8]; 1328 1336 1329 1337 if (!vs->password || !vs->password[0]) { … … 1732 1740 } 1733 1741 1734 static int protocol_client_vencrypt_auth(VncState *vs, char*data, size_t len)1742 static int protocol_client_vencrypt_auth(VncState *vs, uint8_t *data, size_t len) 1735 1743 { 1736 1744 int auth = read_u32(data, 0); … … 1762 1770 } 1763 1771 1764 static int protocol_client_vencrypt_init(VncState *vs, char*data, size_t len)1772 static int protocol_client_vencrypt_init(VncState *vs, uint8_t *data, size_t len) 1765 1773 { 1766 1774 if (data[0] != 0 || … … 1792 1800 #endif /* CONFIG_VNC_TLS */ 1793 1801 1794 static int protocol_client_auth(VncState *vs, char*data, size_t len)1802 static int protocol_client_auth(VncState *vs, uint8_t *data, size_t len) 1795 1803 { 1796 1804 /* We only advertise 1 auth scheme at a time, so client … … 1841 1849 } 1842 1850 1843 static int protocol_version(VncState *vs, char*version, size_t len)1851 static int protocol_version(VncState *vs, uint8_t *version, size_t len) 1844 1852 { 1845 1853 char local[13]; -
trunk/src/host/qemu-neo1973/vnchextile.h
r2981 r3665 14 14 int *has_bg, int *has_fg) 15 15 { 16 char*row = (vs->ds->data + y * vs->ds->linesize + x * vs->depth);16 uint8_t *row = (vs->ds->data + y * vs->ds->linesize + x * vs->depth); 17 17 pixel_t *irow = (pixel_t *)row; 18 18 int j, i;
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