Changeset 4674

Timestamp:

09/27/08 16:37:38 (5 years ago)

Author:

werner

Message:

• moved SPI clock setting from hack-silence-battery.patch (oops !) to tweak-spi.patch
• set the maximum SPI clock to 12MHz and explained what happens if we exceed this limit
• removed unnecessary dummy read before last SPI byte

Location:

developers/werner/wlan-spi/patches

Files:

• hack-silence-battery.patch (modified) (1 diff)
• tweak-spi.patch (modified) (5 diffs)

developers/werner/wlan-spi/patches/hack-silence-battery.patch

@@ -15 +15 @@
         }
  
-Index: korig/arch/arm/mach-s3c2440/mach-gta02.c
-===================================================================
---- korig.orig/arch/arm/mach-s3c2440/mach-gta02.c       2008-09-26 21:19:03.000000000 -0300
-+++ korig/arch/arm/mach-s3c2440/mach-gta02.c    2008-09-26 21:19:07.000000000 -0300
-@@ -1239,7 +1239,7 @@
- static struct spi_board_info gta02_spi_mmc_bdinfo = {
-        .modalias       = "mmc_spi",
-        .irq            = IRQ_EINT3,    /* unused ? */
--       .max_speed_hz   = 25 * 1000 * 1000,
-+       .max_speed_hz   = 10 * 1000 * 1000,
-        .bus_num        = 0,
-        .chip_select    = 0,
-        .mode           = SPI_MODE_0,

developers/werner/wlan-spi/patches/tweak-spi.patch

@@ -1 @@
-Work in progress. Makes spi_s3c24xx.c work for 1 and 10MHz.
-Something breaks at 20 or 25MHz.
+Work in progress. Makes spi_s3c24xx.c work for up to 12MHz.
+
+At speeds of 13MHz or higher, we have setup time issues. I.e., the
+SPI host sees the data coming from the device delayed by one bit,
+even though things look fine on the scope.
+
+This 12MHz/13MHz "barrier" exists with or without probes attached,
+suggesting capacitative loading plays only a minor role in this.
 
 Index: korig/drivers/spi/spi_s3c24xx.c
 ===================================================================
---- korig.orig/drivers/spi/spi_s3c24xx.c        2008-09-26 20:47:30.000000000 -0300
-+++ korig/drivers/spi/spi_s3c24xx.c     2008-09-26 21:06:23.000000000 -0300
-@@ -198,6 +198,29 @@
+--- korig.orig/drivers/spi/spi_s3c24xx.c        2008-09-27 11:28:42.000000000 -0300
++++ korig/drivers/spi/spi_s3c24xx.c     2008-09-27 11:29:40.000000000 -0300
+@@ -198,6 +198,27 @@
         writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT);
         wait_for_completion(&hw->done);
@@ -12 +18 @@
 +       /*
 +        * Get the last byte. Since we don't have more data we can send in
-+        * order to clock the byte out of the SPI system, we need to wait and
-+        * to provide a clock by a dummy read.
++        * order to clock the byte out of the SPI system, we need to wait.
 +        *
 +        * Duh, I'm just handwaving here about possible explanations of what's
@@ -21 +26 @@
 +       if (hw->rx && hw->count) {
 +               udelay(1+10*1000000/spi->max_speed_hz);
-+               //readb(hw->regs + S3C2410_SPRDAT);
 +               hw->rx[hw->count-1] = readb(hw->regs + S3C2410_SPRDAT);
 +       }
@@ -36 +40 @@
  }
  
-@@ -233,8 +256,23 @@
+@@ -233,8 +254,23 @@
  
         hw->count++;
@@ -62 +66 @@
         count++;
  
+Index: korig/arch/arm/mach-s3c2440/mach-gta02.c
+===================================================================
+--- korig.orig/arch/arm/mach-s3c2440/mach-gta02.c       2008-09-27 11:29:48.000000000 -0300
++++ korig/arch/arm/mach-s3c2440/mach-gta02.c    2008-09-27 11:30:13.000000000 -0300
+@@ -1239,7 +1239,7 @@
+ static struct spi_board_info gta02_spi_mmc_bdinfo = {
+        .modalias       = "mmc_spi",
+        .irq            = IRQ_EINT3,    /* unused ? */
+-       .max_speed_hz   = 25 * 1000 * 1000,
++       .max_speed_hz   = 12 * 1000 * 1000, /* SPI doesn't want to go faster */
+        .bus_num        = 0,
+        .chip_select    = 0,
+        .mode           = SPI_MODE_0,